See How Many Clients You're Missing Each Month

Simply enter your business email & Topline AI Agent will show you.

TR

Tam Ross

Verification Engineer at Netronome Systems
Intro Book
Experienced designer with expertise in Ethernet device design.
  • Claim this Profile
Location
Sacramento, California, United States...
Skills
  • Design
image
image

Refer a Friend to Get
100 Credits For FREE

Refer a Friend Now

Bio

Generated by
Topline AI
Tam Ross is a seasoned designer with extensive experience in designing and validating Ethernet devices. He has worked at top companies including Intel, Level One Communications, and IBM, holding positions such as Staff Design Engineer and Verification Engineer. Tam holds a degree from Purdue University.

Experience

  • Netronome Systems
    • Verification Engineer
      • Apr 2008 - May 2009
  • KeyEye Communications
    • Verification Manager
      • Feb 2005 - Mar 2008
  • Intel
    • Sr. Staff Engineer
      • Jan 2000 - Feb 2005

      Design & Validation of Ethernet 802.3 Physical layer devices

  • Level One Communications
    • Staff design engineer
      • Feb 1998 - Dec 1999

      Project Lead for 1GBASE-T Ethernet Physical layer device

  • IBM
    • Staff design engineer
      • Jul 1982 - Jan 1998

      Token Ring communication system design

Education

  • 1978 - 1982
    Purdue University

Suggested Services

This profile is unclaimed. These are suggested service rates with 0% commision upon successful connection

Industry Focus. “Computer Hardware”

Looking to Create a Custom Project?

Need a custom project? We'll create a solution designed specifically for your project.

Get Started

References

Social Profiles

Community

You need to have a working account to view this content. Click here to join now

Similar Profiles