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Srinivasulu Pola is a seasoned VLSI design engineer with 12 years of experience in developing high-speed cross bars and 11 years at Arasan Chip Systems Inc. He holds a Master's degree in Electrical Engineering from Polytechnic Institute of New York University and a Certification in VLSI Engineering from UCSC Extension Silicon Valley.

Credentials

  • Computer Engineering
    Polytechnic Institute of New York University
    Jan, 2010
    - Jun, 2026
  • Certification in VLSI Engineering
    UCSC Extension Silicon Valley

Experience

    • United States
    • Semiconductors
    • 1 - 100 Employee
    • Design Engineer
      • Oct 2012 - Present

      - Responsible for static time constraints development, synthesis, power and area optimization, scan chain insertion for MIPI M-PHY, USB2.0 PHY- Responsible for Timing Sign-off (STA) for MIPI M-PHY, D-PHY, ONFI, USB2.0 PHY- Power Analysis and Back-annotated SDF Simulations

    • Design Engineering Intern
      • Jun 2012 - Oct 2012

    • Graduate Assistant
      • Sep 2011 - Dec 2011

      Responsible for VLSI design and implementation of high speed cross bars in 32nm technology.Handle responsibilities of analyzing and evaluating multi-core interconnection on the chip.Handle the tasks of maintaining and updating the documentation of complete hardware design.

    • Graduate Assistant
      • May 2010 - May 2011

      Helped Administrative Assistants in preparing new I-20’s and DS-2019’s.Oriented International students regarding the rules of Immigration, Curricular & Optional Practical Training.

Education

  • 2010 - 2012
    Polytechnic Institute of New York University
  • 2012 -
    UCSC Extension Silicon Valley
  • 2005 - 2009
    Visvesvaraya Technological University

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Industry Focus. “Semiconductors”

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