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Ramesh Mynala
Asic Design verification engineer at Yoctozant Technologies
Experienced ASIC Design Verification Engineer.
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Location
Bengaluru, Karnataka, India, IN
Bio
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Ramesh Mynala is a seasoned ASIC Design Verification Engineer with 2+ years of experience in the tech industry. He holds a Bachelor of Technology degree in Electronics and Communications Engineering from Aurora's Scientific Technological And Research Academy.
Experience
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Yoctozant Technologies
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Bengaluru, Karnataka, India
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Asic Design verification engineer
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Oct 2021 - Present
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Bengaluru, Karnataka, India
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Education
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2015 - 2019Aurora's Scientific Technological And Research Academy
Bachelor of Technology, Electronics and Communications Engineering -
2013 - 2015
Shivani jr College, Warangal
Intermediate, M.P.C -
2012 - 2013
ZPPSS
SSC
Suggested Services
This profile is unclaimed. These are suggested service rates with 0% commision upon successful connection
Industry Focus. “Semiconductor Manufacturing”
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