Experience

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  Qualcomm

  • Senior Engineer,Digital Hardware

    • Dec 1998 - Sep 2009
• 

  Qualcomm,Inc

  • Senior Engineer

    • Dec 1998 - Sep 2009

    Digital Hardware Design Engineer, RTL design with VHDL, FPGA, ASIC verification in Emulators, Design Verification with Cadance,Spyglass tools, FPGA,ASIC synthesis with Synopsys Design compiler.

  • Senior Engineer

    • Dec 1998 - Sep 2009

    Design and implementation of communication blocks including specification, micro-architecture, coding and interfacing with SRAM, FIFO, Dual Port RAMS and Bus interfaces of AHB, SPI, CRIF .Synthesis and verification for the frontend Generated test cases for the design blocks and verified functions using Modelsim, system C and VERA.Verification of hardware in Emulator with FPGAs of Xilinx Virtex5, Altera StratixII, ARM9 core using C++, VxWorks and Trace32 analyzer. Proficient in FPGA emulation and testing.Post silicon verification in real time system with data capture and analysis for BER using Perl scripts.Integration of IP cores from Xilinx and Altera and verified in FPGA using Chipscope, Signaltap and Agilant Logic Analyzer. Simulation and verification of Exciter and SFU test unit using Spectrum analyzer and LabView.Design of SPI interface block using RTL coding, interface with CRIF bus, and SMP- Short message protocol.Generated test cases using VERA to simulate and verify the asynchronous functioning of SPI interface with randomized tests to capture corner cases.LEC check of ASIC Modem RTL blocks using Cadence Formal Verification Tool and correction of non-equivalent points with design engineersBasic functional work done on LogicVision BIST insertion, ETchecker and ETplanner.Performed Front end functions of synthesis, Timing constraints, Netlist generation, Static Timing Analysis using Primetime and interfaced with Backend Physical design team.Spyglass Lint and CDC verification of ASIC module RTL code. Generate error report and fix the errors with the designers.Development and support of Car kit for Globalstar system. VME power supply development for Globalstar VME rack with redundant power supply facility.

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  Alcatel Business Systems

  • Manager-Technical Product Support

    • Jun 1994 - Nov 1998

    Development of R2MFC signaling system for Alcatel Switching system to work as a Rural Automatic Exchange. Worked as team of engineers for the development at Alcatel, France.Technical product support and customer training of Alcatel Switching systems. Support and training of customers and Alcatel support engineers from South Asian countries on system installation and maintenance.Approval of Alcatel Switching products for compliance from Telecommunication authority of India.Design of a Small EPABX using Intel 80c188 micro-controller with 16 lines and 6 trunks.Managed a team of 5 support engineers in installation and product support of Alcatel switching systems.

  • Manager-Technical Product Support

    • Jun 1994 - Nov 1998

    Development of R2MFC signaling system for Alcatel Switching system to work as a Rural Automatic Exchange. Worked as team of engineers for the development at Alcatel, France.Technical product support and customer training of Alcatel Switching systems. Support and training of customers and Alcatel support engineers from South Asian countries on system installation and maintenance.Approval of Alcatel Switching products for compliance from Telecommunication authority of India.Design of a Small EPABX using Intel 80c188 micro-controller with 16 lines and 6 trunks.Managed a team of 5 support engineers in installation and product support of Alcatel switching systems.

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  BPL Telecom

  • Senior Manager

    • Jun 1979 - May 1994

    Managed a team of 5 engineers in R&D activity of development of switching systems.Development of Four Wire Group Selector system used as a switching unit with E&M signaling used in Power Line Carrier communication systems.Development of Switching systems using Zilog Z80 microprocessor. De...