Bio
Experience
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Advisor To Silicon Catalyst
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TidalSails
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Florida/USA
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Board Member at TidalSails/ Technical Advisor
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Jan 2023 - Present
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Florida/USA
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Senstek
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San Jose
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VP of Mfg.
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Jul 2017 - Present
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San Jose
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CEO
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Nov 2011 - Present
Started Digianalog Technology Inc. in 2011 along with 2 other Professionals. Our focus is to offer Design Services for Digital,Analog, Mixed Signal and Wireless. We also offer Test, Product Engineering, FA, Foundry, Packaging, Yield and Manufacturing support for all the technologies mentioned abo...
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National Semiconductor Corp.
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Santa Clara CA
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Sr. Fellow
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Dec 2010 - Sep 2011
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Santa Clara CA
Sr. Fellow at NSC reporting to the CEO.Focussed on future Technology needed for the Company, New Materials for future Technology Research. Build newer relations with Universities for Research and create Business models.Build relations with third party for outsourcing Design work for BMS. Explore ...
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Sr. VP of R&D and Technology
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Jun 2001 - Nov 2010
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VP of Product Development
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Jun 1996 - Jun 2001
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Director of RISC Microprocessors, MPEG1, 2
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Feb 1988 - Jun 1996
RISC Processors ( MIPS and SPARC)Built a group from scratch to bring in these Technologies from scratch. Finally this led to developing the SONY Playstation 1from inception to full Production in 3 Generations of Techlogies. This took the Company Stock from $4 in 1993 to $ 140 in 1996. This was the major achievemnt in bringing the Company from 1.5 Micron Gate Array Technology to 0.5 Micron CMOS in 6 Years.
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Director
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1988 - 1996
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Sr. Engineering Manager for SRAM/DRAM
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Mar 1983 - Dec 1987
Was part of the team to develop the first CMOS Process using 256K DRAM as the Product. Responsible for implementing the Process to Production, Manage Yield and transfer from 5" Fab in Sunnyvale to 6" New Fab in Austin.Later played a similar role for the High Speed SRAM Products
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Sr. Engineer
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Aug 1978 - Feb 1983
August 1978 to June 1981: Responsible for Process/Product Yield for CCD Linear and Area Imaging Devices.Within 18 months the Division became Profitable. Got the President Award for this achievement.June 1981 to Feb 1983: responsible for the Process/Product of 64K N Channel DRAM.
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Sr. Manager/Engineer
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1967 - 1978
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Education
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1964 - 1967University of Mumbai
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1964 - 1967Sardar Patel University
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