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Divya Gade

Senior Physical Verification Engineer at Si2chip Technologies Pvt. Ltd.
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Experienced hardware engineer with expertise in ASIC and FPGA design, analog IC design, and software tools integration.
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Location
Texas, United States, US
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Bio

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Divya Gade is a seasoned hardware engineer with expertise in ASIC and FPGA design, with a strong educational background in Electrical and Electronics Engineering. She has experience working with various design tools and software, including Xilinx Vivado and Cadence Virtuoso. With a Master's degree from the University of North Texas and a Bachelor's degree from Mahatma Gandhi University, Divya has developed a solid foundation in hardware design methodologies and analog IC design. Her experience spans multiple industries, including semiconductor and technology, with a focus on physical verification engineering, layout design, and software tools integration. Currently based in Texas, Divya is a certified Linux user and continues to expand her skill set in emerging technologies.

Credentials

  • Introduction to Linux
    LinkedIn
    Aug, 2023
    - Apr, 2026

Experience

  • Si2chip Technologies Pvt. Ltd.
    • Bengaluru, Karnataka, India
    • Senior Physical Verification Engineer
      • Jul 2021 - Dec 2021
      • Bengaluru, Karnataka, India

      Reviewed and worked on 4nm partitionsTools : innovus, calibre

  • Altran Technologies Pvt Ltd. (Capgemini)
    • India
    • physical verification engineer
      • Jan 2018 - Jun 2021
      • India

      Worked on partitions/blocks LV cleanup, Debugging and fixing, DRC, IPall, Density, Dfi_integra, Dfmtail, ERC

  • MosChip Institute of Silicon Systems (M-ISS)
    • Hyderabad, Telangana, India
    • Analog layout Trainee
      • Aug 2017 - Dec 2017
      • Hyderabad, Telangana, India

      • Project : Standard Cells Layout Designingo Tools: Virtuoso Layout L Editor, Assura Verification (DRC, LVS) o Cells Designed: INVERTER, AND, NAND, OR, NOR, EXOR, MUX, D-Flip Flop, MATRIX o Technology node: TSMC 130nm o Role: Drawing the stick diagrams from given Schematic and designing the Layout from schematic and Verifying DRC and LVS

Education

  • 2022 - 2023
    University of North Texas
    Masters, Electrical and Electronics Engineering
  • 2013 - 2017
    Mahatma Gandhi University, Nalgonda
    Bachelor of Technology - BTech, electronics and communication engineering

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Industry Focus. “Computer Hardware”

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