Experience

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  SiRF Technology (India) Pvt. Ltd - Bangalore

  • Principal Engineer, Systems

    • Aug 2007 - Present

    > Specification of next generation multi-function radio.> Architecture of Bluetooth Low Energy Wireless DuMo solution and other Bluetooth enhancements in baseband, modem and RF interface.> Created and led a small team to own Bluetooth modem systems models. ULP/LE and BT sensitivity impro...

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  STEricsson

  • Embedded SW (GPS)

    • 2009 - 2010
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  SiRF Technology (India) Pvt. Ltd - Noida

  • Principal Engineer, ASIC

    • Jun 2004 - Jul 2007

    > Silicon validation of Bluetooth digital subsystem (apart from external IPs) in the SoC chip.> Led the design effort for the Bluetooth digital subsystem of the SoC chip. This included:. -Integration and maintenance of external IPs (Bluetooth, PCM+voice, RAM, ARM).. -Internal IPs (modem, R...

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  SiRF Technology Inc - San Jose & Irvine

  • Staff Design Engineer, ASIC

    • Jul 2001 - Jun 2004

    (I played important roles in all generations of SiRF GPS chips).> Retargeting of flagship GPS product using power-compiler to new technology to gain power and area advantage. Also used feedback from power-compiler power estimations to optimize data-path RTL. > Processor subsystem customiza...

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  Aerospace Systems Pvt. Ltd (Intermittent deputa...

  • Deputy General Manager

    • Jul 1995 - Jun 2001

    > Modification of GPS engine to make it amenable to DFT for conversion to IP core.> Enhancements to GPS engine to improve reacquisition searches.> Datapath and state-machine based implementation of DSP for dual channel MSK receiver. > Datapath and state-machine based implementation of...

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  Aerospace Systems Pvt. Ltd

  • Engineer

    • Apr 1993 - Jul 1995

    > System design: Enhancement of secondary surveillance radar (addition of new mode).. -Review of interface definitions, Design review, Overview of FPGA, SW & FPGA design process (Review and testing of RTL & gates, PCB design review, LVS (Layout-vs-Schematic) review, SW debug), System ...

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  Electronics Research and Development Centre - T...

  • Member Technical Staff

    • Mar 1992 - Mar 1993

    > Schematic entry based design flow for XILINX FPGA: . -All peripherals and glue-logic of a processor board was compressed in to a single XILINX FPGA. This was used in a VSAT terminal. The peripherals included serial port, interrupt controller, ISA bus interface etc. > SPICE simulation of...