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Abhay Jagannath profile image

Abhay Jagannath

Machine Learning Engineer at DeepEdge
Intro Book
Full-Stack Machine Learning engineer with expertise in SaaS platform development and digital design.
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Location
Hyderabad, Telangana, India, IN
Languages
  • French Limited working proficiency
  • English Native or bilingual proficiency
  • Hindi Native or bilingual proficiency
  • Telugu Elementary proficiency
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Bio

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Abhay Jagannath is a seasoned Full-Stack Machine Learning engineer with expertise in MongoDB, FastAPI, React, Docker, OpenCV, Pytorch & Tensorflow. He has experience in building SaaS platforms and has worked on various projects including DeepEdge platform SaaS. He also has experience in digital design and has worked as a Digital Design Intern at Texas Instruments. Additionally, he has completed various certifications in computer networking, programming, and psychology. Abhay holds a Bachelor of Engineering degree from BITS Pilani, Hyderabad Campus, and has worked in Hyderabad, Telangana, India.

Credentials

  • Introduction to Quantum Computing Certificate of Completion
    The Coding School
    May, 2021
    - Apr, 2026
  • The Bits and Bytes of Computer Networking
    Google
    Aug, 2020
    - Apr, 2026
  • Programming for Everybody (Getting Started with Python)
    University of Michigan
    Jun, 2020
    - Apr, 2026
  • Introduction to Psychology
    Yale University
    May, 2020
    - Apr, 2026
  • Privacy in the Western World
    EIT Digital
    May, 2020
    - Apr, 2026

Experience

  • DeepEdge
    • Hyderabad, Telangana, India
    • Machine Learning Engineer
      • Nov 2023 - Present
      • Hyderabad, Telangana, India

      Building the DeepEdge platform SaaS as a Full-Stack Machine Learning engineer. Primary Tech Stack: MongoDB, FastAPI, React, Docker, OpenCV, Pytorch & Tensorflow, AWS ECR.

  • Texas Instruments
    • Bengaluru, Karnataka, India
    • Digital Design Intern
      • Aug 2022 - Dec 2022
      • Bengaluru, Karnataka, India

      Developed a UVM based functional verification toolkit for Sanity Testing using automation on SoC level Connectivity for Low Power microprocessors.

  • Ceremorphic, Inc.
    • Hyderabad, Telangana, India
    • Summer Research Intern
      • Jun 2021 - Jul 2021
      • Hyderabad, Telangana, India

      Researched and Surveyed 2D/3D Architectures for FPGAs, Reviewed landscape of Open Source FPGA design tools. Worked with the VTR CAD Flow.

Education

  • 2019 - 2023
    BITS Pilani, Hyderabad Campus
    Bachelor of Engineering - BE, Electronics and Instrumentation

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