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Marjan Asadinia is a Ph.D. holder in Computer Engineering from Sharif University of Technology, with expertise in reliability and durability of phase change main memory (PCMs) and non-contiguous processor allocation in mesh-based chip multi-processors (CMPs). She has experience as a Postdoctoral Fellow at the University of Arkansas, Postdoctoral Research Associate at Oregon State University, and Adjunct/Assistant Professor at California State University, Northridge, and California Polytechnic State University, Humboldt. Her research interests include network modeling, scheduling algorithms, and routing algorithms of freight transportation systems, as well as error correction codes in Flash memories and deep learning technology.

Experience

    • Assistant Professor
      • Aug 2023 - Present

  • California Polytechnic State University, Humboldt
    • Arcata, California, United States
    • Assistant Professor
      • Aug 2022 - Jul 2023
      • Arcata, California, United States

    • Adjunct Professor
      • Aug 2022 - Jul 2023

    • Assistant Professor
      • Aug 2021 - Jul 2022

    • United States
    • Higher Education
    • 700 & Above Employee
    • Postdoctoral Fellow at Computer Engineering Department
      • Dec 2018 - Jan 2020

      •Involved in a multidisciplinary project in Computer, Civil and Industrial Engineering Departments.•Conducted extensive studies on network modeling, scheduling algorithms, and routing algorithms of freight transportation systems in regards to US hours of service regulations (HOS) •Developed algorithm, optimized network model and developed method•Implemented network model by agent-based modeling and simulation software (NetLogo, Repast), used SQL to collect and manage data and R software •Directed research and mentored of graduate students in the Freight Transportation Data Research lab

    • Postdoctoral Fellow at Computer science and Computer Engineering Department
      • Nov 2017 - Dec 2018

      •Directed research and mentored of young researchers and graduate students in the Smart Embedded Systems Lab. This included project management, elaboration of reports, publications, and presenting of research results at appropriate venues.•Designed algorithms and proposed different mechanisms for prolonging Non-Volatile Memories’ (NVMs) lifetime •Solved security issues of new memory technologies •Applied coding mechanism for bit-flip reduction in NVMs, especially for PCMs•Used optimization methods for placement algorithms and resource allocation in Network-on-Chips (NoCs) and System-on-Chips (SoCs)

  • Oregon State University
    • Corvallis, Oregon, United States
    • Postdoctoral Research Associate
      • Aug 2016 - Nov 2017
      • Corvallis, Oregon, United States

      •Application mapping for chip multiprocessors•Studied and developed new ideas on error correction codes in Flash memories •Studied deep learning technology, machine learning accelerators, post-Moore's era architecture, and applications of ML in architecture designs at System Technology and Architecture Research Lab (STAR Lab)•Extended my research work on reliability and durability aspects of NVMs•Reviewed journal and conference papers

    • Editor in Chief Assistant
      • Jan 2011 - Apr 2016
      • Tehran

    • Programmer and Coordinator
      • May 2008 - Sep 2008
      • Tehran

      •Coordinator of the development team that developed a mobile payment application on iMate devices. •Member of Enterprise application development including GUI, Logic, and Database connection. •Member of the design team for the security part of the application. •Member of business study and business plan production team. •Implemented a security scheme incorporating different encryption methods, like 3DES, DES, and SHA-1.

Education

  • 2012 - 2016
    Sharif University of Technology
    Ph.D., Computer Engineering

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Industry Focus. “Computer Hardware”

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