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Logosent Semiconductors

Semiconductor Manufacturing

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Logosent Semiconductors

Overview

Our Products ____________________________________________________________________ DSP System Generation Solutions - Optimized for your needs: - Use the Logosent SParrow tools and libraries to convert DSP System concepts into integrated RTL (SystemVerilog) and C++ code, ready to deploy on FPGAs/ASICs or CPUs with minimal effort and time. - The rich SParrow DSP libraries are pre-verified against MATLAB® models, fully configurable and optimized for deployment in domains like Test & Measurement, RF, Audio and Sensors. - The SParrow tools also support popular AP-SOC/FPGA Prototyping platforms like ZedBoard and ZC702, as well as HS-ADC boards like ADI AD9467-FMC-EBZ. Fully Validated Off-the-Shelf IPs & Drivers - Configurable using our DSP generator SParrow Tools: - All our IPs are Pre-Verified for accuracy against MATLAB® models, taken through rigorous RTL simulations and fully validated at high Sample/Clock rates on FPGA platforms. - All our IP packages are accompanied by the required supporting software, which includes the drivers and other run-time functions to initialize and run the RTL. - Our IPs provide the users with highest flexibility in terms of generation-time configurability of RTL and run-time programmability. A version of SParrow is included for configuring each IP. Our Services ____________________________________________________________________ We offer specialized system development and prototyping services leveraging our own products and internal tools, in order to significantly reduce the turn-around-time and also to ensure quality by virtue of correct-by-construction approaches. The key value additions of our service offerings are: Faster concept-to-deployment turn around: - Typically 50% to 75% reduction in efforts (MMs), compared to conventional skilled-resource-based estimates. - Reduced number of iterations due to early model based validation and correct-by-construction integration approaches. High quality deliverables: - We leverage our pre-verified leaf-library and integration tools for minimizing bugs and system level issues. - Our deliverables are typically validated using a three-stage process: - MATLAB®/C modelling based feasibility analysis, as applicable. - Detailed verification (RTL) through simulations and coverage analysis. - Prototyping (depending up on feasibility) on hardware platforms like FPGA/AP-SOC. - Emphasis on ensuring portability and compatibility of our deliverables. Configurability of Systems: - We offer (on demand) additional capabilities to easily tune/re-configure the systems that we deliver to our clients. - The configurability is usually achieved by including a customized version of our system generation tools along with our deliverables. Prototyping Platforms: - We have several state-of-the-art equipment and boards in our lab for enabling real-time validations of DSP systems and IPs. - Such platforms include XILINX® AP-SOC/FPGA based development boards, HS-ADC/DAC boards, DSOs, function generators etc. Visit for more details : WWW.LOGOSENT.COM

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    Karnataka High Court, Doctor B R Ambedkar Veedhi, Fair Field Layout, Shanthala Nagar, Bengaluru, Bangalore North, Bengaluru Urban, Karnataka, 560001, India

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