Experience

Ethernovia

• United States
• Semiconductor Manufacturing
• 1 - 100 Employee

• Senior Member of Technical Staff

  • Feb 2023 - Present

  Ontario, Canada Design and implement ASIC chips for automotive



Groq

• United States
• Semiconductor Manufacturing
• 100 - 200 Employee

• ASIC Design Engineer

  • Aug 2021 - Feb 2023

  ASIC designer for: - compute and memory system - DVFS and low power circuits - full chip controls including security, clocking etc.



Splunk

• United States
• Software Development
• 700 & Above Employee

• Sr. IoT Engineer

  • Jul 2020 - Aug 2021

  Toronto, Ontario, Canada architect for generic text processing hardware and systems



Intel - PSG

• Hardware Designer

  • Sep 2017 - Jul 2020

  Toronto External Memory Interface * high speed QDR4 memory bus calibration: command and address deskew, read and write data bus deskew etc. * QDR4 request scheduler: schedule requests from multiple ports while respecting the read and write turn around time constraint and avoiding bank conflicts * memory interface hardware bring up: debug high speed signals using oscilloscope, logic analyzer etc. * hardware IPs test automation



OTI Lumionics

• Canada
• Chemical Manufacturing
• 1 - 100 Employee

• Senior System Enginner

  • Mar 2015 - Aug 2017

  Toronto, Canada Area *circuit design: -Digitally controlled adjustable current or voltage source, multi-channel. -High precision ADC circuit -TI CC26xx based Bluetooth 4.0 system -Solid state relays using CMOS FETs -Power and signal Op-Amps *PCB design: -4-layer PCB with mixed digital and analog circuits -low background noise design for small analog signal -Bluetooth antenna *Embedded system: -arduino, raspberry-pi, FPGAs etc. *Industrial… Show more *circuit design: -Digitally controlled adjustable current or voltage source, multi-channel. -High precision ADC circuit -TI CC26xx based Bluetooth 4.0 system -Solid state relays using CMOS FETs -Power and signal Op-Amps *PCB design: -4-layer PCB with mixed digital and analog circuits -low background noise design for small analog signal -Bluetooth antenna *Embedded system: -arduino, raspberry-pi, FPGAs etc. *Industrial control: -DC motor, CNC platform -Omron, Beckhoff PLCs *Database: -Mysql, SQLite, etc. *System development: -C#, Python, Java, Node.js, javascript etc. *Mobile App: -Android Bluetooth application Show less



Changsha Phytium

• CPU Hardware Engineer

  • Jun 2013 - Jan 2015

  64-bit ARM CPU hardware enginner



University of Toronto

• Canada
• Higher Education
• 700 & Above Employee

• PhD student

  • Sep 2008 - May 2013

  Interesting projects I have worked on: 1. Online video cache design: Why and how you can use cheap commodity flash memories to build large capacity caches for online video servers. 2. Memory based switching: How high-radix high-capacity switch fabrics can be built on a single chip FPGA that saturate the transceiver I/O bandwidth 3. Multiport memory scheduling: How multiport memory scheduler can achieve both minimum latency and bandwidth guarantees for multiple ports… Show more Interesting projects I have worked on: 1. Online video cache design: Why and how you can use cheap commodity flash memories to build large capacity caches for online video servers. 2. Memory based switching: How high-radix high-capacity switch fabrics can be built on a single chip FPGA that saturate the transceiver I/O bandwidth 3. Multiport memory scheduling: How multiport memory scheduler can achieve both minimum latency and bandwidth guarantees for multiple ports simultaneously, while improving the effective DRAM bandwidth and energy efficiency. 4. 2D geographic cache: How a tiny (512 bytes) cache can achieve superior cache hit rate for video decoders. How to build 2D caches that present a real 2D view of the data to users. 5. XML parsing accelerator: How to accelerate XML processing using custom hardware and achieve wire speed processing. 6. Parallelize CMOS Design Rule Checking using Pthread and CUDA. Show less



Metabacus

• intern

  • May 2010 - Sep 2010

  toronto 1. Construct an embedded platform for a portable multimedia player on FPGA, which includes an AEMB processor, i-cache, d-cache, Ethernet link, DVI display controller, multiport memory controller and a video decoder. 2. Design and implement a 2D geographic cache for the video decoder, which presents data to the video decoder as 2D pictures, where any row or any column of the picture can be retrieved by a single command and in a single read cycle. 3. Design and implement a… Show more 1. Construct an embedded platform for a portable multimedia player on FPGA, which includes an AEMB processor, i-cache, d-cache, Ethernet link, DVI display controller, multiport memory controller and a video decoder. 2. Design and implement a 2D geographic cache for the video decoder, which presents data to the video decoder as 2D pictures, where any row or any column of the picture can be retrieved by a single command and in a single read cycle. 3. Design and implement a multi-port bandwidth scheduler, which provides various types of QoS guarantees to multiple users that share a common resource and encourages a bursting style of scheduling. Show less