Yi-Pei Su
Principal RFIC engineer at TeraSilIC CO., LTD.- Claim this Profile
Click to upgrade to our gold package
for the full feature experience.
-
Chinese (Traditional) -
-
English -
-
Taiwanese -
Topline Score
Bio
Experience
-
TeraSilIC CO., LTD.
-
Taiwan
-
Semiconductor Manufacturing
-
1 - 100 Employee
-
Principal RFIC engineer
-
Jul 2017 - Present
Design PLL-based frequency synthesizers project leader Design PLL-based frequency synthesizers project leader
-
-
-
Realtek Semiconductor Corp.
-
Taiwan
-
Semiconductor Manufacturing
-
700 & Above Employee
-
Senior RFIC engineer
-
Dec 2015 - Jun 2017
Design PLL-based frequency synthesizers for 802.11 g and bluetooth Design PLL-based frequency synthesizers for 802.11 g and bluetooth
-
-
-
VIA Telecom
-
Telecommunications
-
1 - 100 Employee
-
RF IC design engineer
-
Jan 2013 - Dec 2015
Projects undertaken : 1. Single chip for dual-band (Cellular and PCS band) CDMA-2000 transceiver and GPS receiver ( VIA Telecom., Inc.), 10/2014 – 7/2015 Design and integration of the fractional-N frequency synthesizer for GPS. 2. GSM transceiver ( VIA Telecom., Inc.), 10/2014 – 5/2015 Research and design the frequency synthesizer for GSM transceiver. 3. SOC of single-band CDMA-2000 transceiver and basedband ( VIA Telecom., Inc.), 4/2014 – 10/2014 Testing and… Show more Projects undertaken : 1. Single chip for dual-band (Cellular and PCS band) CDMA-2000 transceiver and GPS receiver ( VIA Telecom., Inc.), 10/2014 – 7/2015 Design and integration of the fractional-N frequency synthesizer for GPS. 2. GSM transceiver ( VIA Telecom., Inc.), 10/2014 – 5/2015 Research and design the frequency synthesizer for GSM transceiver. 3. SOC of single-band CDMA-2000 transceiver and basedband ( VIA Telecom., Inc.), 4/2014 – 10/2014 Testing and debugging of the frequency synthesizer for single-band CDMA-2000 transceiver. Especially focus on the pulling issue between frequency synthesizer and transmitter. 4. Single chip for single band CDMA-2000 transceiver and GPS receiver ( VIA Telecom., Inc.), 5/2013 – 7/2014 Design and integration of the fractional-N frequency synthesizer for GPS. Design of partial circuits for the dual-band CDMA-2000 frequency synthesizer. 5. Single chip for single-band CDMA-2000 transceiver ( VIA Telecom., Inc.), 1/2013 – 10/2013 Measured and modified of the CDMA-2000 frequency synthesizer.
-
-
RF IC design engineer
-
Jan 2013 - Dec 2015
Design, test and debug the frequency synthesizer for CDMA-2000 and GPS.
-
-
-
-
RF IC design consultant
-
Oct 2007 - Jul 2009
Project undertaken: 1. Single chip for the Bluetooth RF transceiver ( MuChip Co., Ltd.), 10/2007-7/2009 Build the phase noise model of the fractional-N frequency synthesizer for the Bluetooth RF transceiver. Debugging the jitter issue of a DLL-based clock generator. Project undertaken: 1. Single chip for the Bluetooth RF transceiver ( MuChip Co., Ltd.), 10/2007-7/2009 Build the phase noise model of the fractional-N frequency synthesizer for the Bluetooth RF transceiver. Debugging the jitter issue of a DLL-based clock generator.
-
-
Education
-
National Taiwan University
Doctor of Philosophy - PhD, Electronics Engineering -
National Taiwan University
Doctor of Philosophy (Ph.D.) ( withdraw ), Electronics Engineering -
National Taiwan University
Master’s Degree, Electronics Engineering -
National Cheng Kung University
Bachelor’s Degree, Electrical Engineering