Yasser Kilde Bajwa

Chief Product Officer at Grazper
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Contact Information
us****@****om
(386) 825-5501
Location
Copenhagen, Capital Region, Denmark, DK
Languages
  • English Native or bilingual proficiency
  • Danish Native or bilingual proficiency
  • Urdu Native or bilingual proficiency
  • Hindi Limited working proficiency

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Experience

    • Denmark
    • Software Development
    • 1 - 100 Employee
    • Chief Product Officer
      • Dec 2019 - Present

    • Sr. FPGA Design Engineer
      • Mar 2017 - Dec 2019

    • Digital Design Consultant
      • Aug 2016 - Feb 2017

      Working as an independent VHDL consultant for companies based in Europe. Tools and Skills used: VHDL, C, Altera Quartus, Xilinx Vivado, VCS, ModelSim Working as an independent VHDL consultant for companies based in Europe. Tools and Skills used: VHDL, C, Altera Quartus, Xilinx Vivado, VCS, ModelSim

  • MTI Mobile
    • Copenhagen Area, Denmark
    • IP Core Product Manager
      • May 2014 - Jul 2016

      Managing the IP portfolio of MTI Mobile and coordinating development work of international design team (Denmark/Poland/Taiwan). Active sales of IP products (CPRI, OBSAI and JESD204B) and initial price and terms negotiations. Maintaining and developing customer contacts. Future business strategy and forecasting. VHDL design of new CPRI core for ASIC and technical support of existing customers. 5G research on mobile networking infrastructure. Planning and coordination of teams in Taiwan, Denmark and USA. Show less

    • Digital Design Consultant
      • Feb 2013 - Apr 2014

      Worked as an independent VHDL design consultant for companies based in Europe.The main focus being on designing and implementing components for a mobile network infrastructure. Tools and Skills used: VHDL, C, Altera Quartus, Xilinx Vivado, VCS, ModelSim Worked as an independent VHDL design consultant for companies based in Europe.The main focus being on designing and implementing components for a mobile network infrastructure. Tools and Skills used: VHDL, C, Altera Quartus, Xilinx Vivado, VCS, ModelSim

    • Denmark
    • Telecommunications
    • 1 - 100 Employee
    • FAE and FPGA design engineer
      • Jul 2010 - Sep 2012

      Designing VHDL components for 4G Wimax and LTE Radioheads. On-site integration and support of customers. Mainly focused on interconnecting protocols such as CPRI, OBSAI, JESD204B, SPI, I2C, Ethernet and UART.

    • Student worker
      • Mar 2008 - Jun 2010

      Part time work while studying for my Masters. Mainly VHDL development but also some C programming, DSP and field support work.

Education

  • Danmarks Tekniske Universitet / Technical University of Denmark
    Masters, Telecommunications Engineering
    2007 - 2010
  • Copenhagen University College of Engineering
    Bachelor, Electronic Engineering
    2002 - 2006

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