Experience

成都海光

• China
• Environmental Services

• Senior Staff Engineer

  • Sep 2020 - Present

  项目经理，带领团队完成先进工艺SOC芯片的物理设计工作 项目经理，带领团队完成先进工艺SOC芯片的物理设计工作



上海实真微电子有限公司

• 物理设计经理

  • Feb 2019 - Aug 2020

  Design service for Hygon, focus on TSMC 7nm CPU/GPU projects. Especially expert in PCIE/Serdes interface block P&R implementation and sing-off . Design service for Hygon, focus on TSMC 7nm CPU/GPU projects. Especially expert in PCIE/Serdes interface block P&R implementation and sing-off .



PowerCore Technology Corporation

• Computer Hardware Manufacturing
• 1 - 100 Employee

• Physical Design Manager

  • May 2015 - Jan 2019

  IBM Power CPU chips physical integration IBM Power CPU chips physical integration



上海芯海集成电路设计有限公司

• China
• Semiconductor Manufacturing

• Physical Design Manager

  • Jun 2014 - Apr 2015

  Design service for Hisilicon Design service for Hisilicon



Synapse Design Inc.

• United States
• Semiconductors
• 500 - 600 Employee

• Physical Design Manager

  • Jun 2013 - Jun 2014

• Senior Physical Design Engineer

  • Jun 2011 - May 2013

  TSMC 28nm or Global Foundry 28nm Physical Design- Complete full implementation of assigned blocks- Complete Timing Signoff- Complete DRC/LVS Signoff- Complete IR/EM Signoff



Trident Microsystems

• United States
• Semiconductor Manufacturing
• 100 - 200 Employee

• Senior Physical Design Engineer

  • Apr 2010 - Jun 2011

  Complete TSMC 45nm & 65nm project implementation, including chip/block level floorplan, power plan, place, routing, clock tree synthesis, timing closure, physical verification. Complete TSMC 45nm & 65nm project implementation, including chip/block level floorplan, power plan, place, routing, clock tree synthesis, timing closure, physical verification.



Tokyo Electron Device, Ltd.

• Japan
• Computer Networking Products
• 100 - 200 Employee

• ASIC Design Engineer

  • Jul 2006 - Mar 2010

  Complete Fujitsu 90nm & 130nm &180nm preject implementation - Based on TEL Shanghai, and on board at TEL Japan for 1.5 years. - Provided design service for Japanese customers, participated in chip estimate. - Communicted with costomers as a interface - Completed chip implementation, start from design compiling and DFT - Completed place, clock tree synthesis, routing - Completed timing closure - Completed physical verification - Completed IR/EM signoff Complete Fujitsu 90nm & 130nm &180nm preject implementation - Based on TEL Shanghai, and on board at TEL Japan for 1.5 years. - Provided design service for Japanese customers, participated in chip estimate. - Communicted with costomers as a interface - Completed chip implementation, start from design compiling and DFT - Completed place, clock tree synthesis, routing - Completed timing closure - Completed physical verification - Completed IR/EM signoff