Wei-Chih Liu

Principal Member Of Technical Staff at Rivos Inc.
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Contact Information
us****@****om
(386) 825-5501
Location
Hsinchu City, Taiwan, Taiwan, TW
Languages
  • English Professional working proficiency
  • Chinese Native or bilingual proficiency

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Experience

    • United States
    • Computer Hardware Manufacturing
    • 100 - 200 Employee
    • Principal Member Of Technical Staff
      • Aug 2022 - Present

    • United States
    • Software Development
    • 700 & Above Employee
    • Silicon CAD and infra
      • Jul 2018 - Aug 2022

      1. CAD lead for PD, RTL, and DV domains 2. Chef architect of end2end physical design framework 3. Chef architect of DK/PDK release framework 1. CAD lead for PD, RTL, and DV domains 2. Chef architect of end2end physical design framework 3. Chef architect of DK/PDK release framework

    • United Kingdom
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Staff Application Engineer
      • Jul 2016 - Jul 2018

      1. Cortex-A CPU implementation training and bring-up 2. Cortex-A CPU PPA with advanced technology 3. Cortex-A CPU OoO validation for implementation flow 1. Cortex-A CPU implementation training and bring-up 2. Cortex-A CPU PPA with advanced technology 3. Cortex-A CPU OoO validation for implementation flow

    • China
    • Telecommunications
    • 700 & Above Employee
    • Senior Engineer
      • Jan 2016 - Jul 2016

      1. Kirin 950 GPU implementation PPA methodology 2. Kirin 960 GPU implementation PPA methodology 3. TSMC 10nm process benchmark 1. Kirin 950 GPU implementation PPA methodology 2. Kirin 960 GPU implementation PPA methodology 3. TSMC 10nm process benchmark

    • Taiwan
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Section Manager
      • Oct 2008 - Jan 2016

      1. Integrated Signoff Flow System Development for advanced process 2. N10 test chip physical implementation. 3. Customer support on N16FF process physical implementation and N10/N16FF flow development 4. Tape-out review system development 1. Integrated Signoff Flow System Development for advanced process 2. N10 test chip physical implementation. 3. Customer support on N16FF process physical implementation and N10/N16FF flow development 4. Tape-out review system development

    • United States
    • Computers and Electronics Manufacturing
    • 700 & Above Employee
    • Contractor
      • Sep 2013 - Dec 2014

      1. PPA for SoC blocks 2. CPU implementation and PPA 3. CPU signoff flow development 4. IP qualification utilities development 1. PPA for SoC blocks 2. CPU implementation and PPA 3. CPU signoff flow development 4. IP qualification utilities development

    • United States
    • Software Development
    • 700 & Above Employee
    • Intern
      • Jun 2007 - Aug 2007

      regression test for HSIM regression test for HSIM

Education

  • National Taiwan University
    Master's degree, Electrical Design Automation
    2006 - 2008
  • National Taiwan University
    Bachelor's degree, Computer Science
    2002 - 2006

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