Vitaliy Kuhar
Engineering Team Lead at Avnet ASIC Israel- Claim this Profile
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Bio
Experience
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Avnet ASIC Israel
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Israel
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Appliances, Electrical, and Electronics Manufacturing
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1 - 100 Employee
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Engineering Team Lead
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2019 - Present
Digital IC Design Team Lead Digital IC Design Team Lead
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MELEXIS
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Belgium
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Semiconductor Manufacturing
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700 & Above Employee
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Digital IC Team Lead/Digital Design Engineer
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Jun 2012 - 2018
Semiconductor professional with 10+ years of experience as Digital IC Design Team Lead / Engineer. Rich experience in Digital Architecture/Requirements development, Micro-architecture Design, Area and Power Optimization, RTL design, Constrained Random Verification, Mixed-Signal modelling, IC testing/DFT.As Team Lead: - Managing team of 7 digital IC designers - Dealing with internal and external customers, reviewing product specification - Arranging and leading weekly team meetings, focusing on targets and achievements - Facilitating brainstorming sessions and project reviews - Coaching students and junior designersAs Digital IC Designer:- 10+ projects taped-out; 3 products transferred to production; major customers: Bosch, Continental, Sensata- Hardware Design VHDL/Verilog: IP, DSP, SoC and CPU- FPGA prototyping- RTL design meeting automotive safety requirement (ISO 26262)- Constrained Random Verification, Assertion Based Verification, Formal Verification- STA, multiple clock domain design, area and power optimization- Design-for-Test Show less
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Design Engineer
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Jul 2007 - May 2012
Digital ASIC design: system modeling, RTL design, STA, DFT, functional verification, application support.
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Education
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KTH Royal Institute of Technology
Master of Science, System-on-Chip Design -
Master of Science