Experience

Brands of Bharat

• India
• Wholesale Food and Beverage
• 1 - 100 Employee

• Co-Founder

  • May 2019 - Present

  Bengaluru Area, India Transforming FMCG Brands for Bharat



Dozee

• India
• Hospitals and Health Care
• 100 - 200 Employee

• Research and Development Head

  • Oct 2016 - Mar 2019

  Bengaluru Area, India Led research and development of contact-less, non-wearable health and sleep activity monitor. Dozee sits under your mattress and while you sleep, extracts insightful body vitals and sleep patterns using our proprietary bio-signal processing algorithms. Our AI engine is proven to be over 95% accurate against medical golden standards. Visit www.dozee.io for exciting stuff.



Intel Labs

• United States
• Research Services
• 700 & Above Employee

• Research Scientist

  • Aug 2015 - Sep 2016

  Bengaluru Area, India Member of the Microarchitecture Research Lab. Worked on re-design and optimizations of execution path as well as memory-side fabric for Intel GEN graphics processors for higher performance.



Samsung Research & Development Institute, Bangalore

• Technical Lead

  • May 2015 - Aug 2015

  Bangalore A brief stint at Samsung Advanced Institute of Technology. Worked on the power and performance optimization of ultra-low power tile-based deferred rendering GPUs.



University of Pennsylvania

• United States
• Higher Education
• 700 & Above Employee

• Ph.D. Student

  • Sep 2010 - Oct 2014

  Greater Philadelphia Area Member of Implementation of Computation Group (http://ic.ese.upenn.edu). Lead student hardware architect on the DARPA CRASH/SAFE project (http://www.crash-safe.org/) aimed at a clean-slate co-design of the entire computing stack for secured computation. We built an entire new ISA, programming language, compiler and OS with a security-first approach. Multiple publications and patents were generated. The core technology is now part of the Dover Microsystems' CoreGuard… Show more Member of Implementation of Computation Group (http://ic.ese.upenn.edu). Lead student hardware architect on the DARPA CRASH/SAFE project (http://www.crash-safe.org/) aimed at a clean-slate co-design of the entire computing stack for secured computation. We built an entire new ISA, programming language, compiler and OS with a security-first approach. Multiple publications and patents were generated. The core technology is now part of the Dover Microsystems' CoreGuard (https://dovermicrosystems.com) IP and micropolicy suite. Show less



Centre for High Performance Embedded Systems, Nanyang Technological University

• Research Assistant

  • Jun 2009 - Jun 2010

  Singapore Member of the Design Methodologies Group and the Vision Enabled Sensing Group at CHiPES. Developed hardware binding algorithms for creating efficient datapaths for FPGA based designs, and hardware-efficient algorithms for online edge detection for use in smart cameras.