Experience

INVIVO Wellness
• United States
• Wellness and Fitness Services
• 1 - 100 Employee
• Front Desk Associate

  • Sep 2022 - Present


Milwaukee School of Engineering

• United States
• Higher Education
• 700 & Above Employee

• Embedded Systems Project: Intel DE-10 Lite FPGA Computer System on a Chip

  • Mar 2023 - May 2023

  Objective: Design a multifunctional System on a Chip. Wrote VHDL and used Quartus Platform Designer to design computer system on DE-10 Lite FPGA using a Nios-II processor as a base. Wrote custom APIs in C for on board peripheral, including Seven Segment Display, Hobby Servo, LT24 LCD Display, LT24 Touch Screen, Joystick Control, Accelerometer (I2C) systems, switches, buttons, and LEDs built into the FPGA. Designed test application for computer system that implements supported on-board components. Debugged and tested custom APIs in real time. Show less

• Embedded Systems Project: MSOE Development Board LCD Display

  • Sep 2022 - Feb 2023

  Objective: Interface with MSOE STM32 microprocessor development board and allow for user-inputted characters, numbers, and commands to be projected onto onboard LCD display. Developed ARM Assembly written API that utilized direct access to CPU registers to manipulate peripheral registers and successfully enable components [register timers, pin output modes, and data bus inputs].  Successfully debugged and ensured commands such as writing values to memory locations, shifting LCD cursor, and resetting LCD display were all functioning and efficient.  Developed secondary API that translated previous ARM Assembly API into C language alternative that utilized C’s portability to manipulate registers with register pointers and allow user to enter characters, values, and commands through a serial bus console. Show less

• Computer Architecture Project: Single Cycle Processor

  • Mar 2022 - May 2022

  Objective: Develop single cycle processor that runs on an ARM Instruction Set Architecture.  Developed processor components (Arithmetic Logic Unit and Register File) in VHDL using Intel Quartus to satisfy 5 stages of a processor: Fetch, Decode, Execute, Memory, and Writeback.  Built single cycle processor circuit around an ARM ISA using these components.  Translate basic ARM instructions into machine code to program an IROM to run processor. Objective: Develop single cycle processor that runs on an ARM Instruction Set Architecture.  Developed processor components (Arithmetic Logic Unit and Register File) in VHDL using Intel Quartus to satisfy 5 stages of a processor: Fetch, Decode, Execute, Memory, and Writeback.  Built single cycle processor circuit around an ARM ISA using these components.  Translate basic ARM instructions into machine code to program an IROM to run processor.