Experience

AppliedMicro

• United States
• Semiconductor Manufacturing
• 100 - 200 Employee

• SOC Emulation Consultant

  • Aug 2010 - Present

  Setting up the methodology and tool flow for building and testing the next generation multi-core SOCs in hardware emulator (Cadence Palladium III, PxP, and RPP FPGA boards). Support the emulation environment(s) to verify various IPs and the SOCs, from RTL snapshot to emulation databases, to pre- and post-silicon bring-up • Responsible for emulation design compilation (ixcom and ice flow), regression setup, hardware setup, test case debug and failure analysis. Integrating new IPs and speed bridges to test various SOC interfaces such as USB, Ethernet, SATA, Video, PCI-Express, etc. • Familiar with JTAG debugger and interfaces for PPC, MIPS, Tensilica cores, and bring-up emulation model with NAND, NOR FLASH, DDR-SDRAM, etc. • Working closely with other verification, validation and software engineers to debug and root cause issues Show less



LSI, an Avago Technologies Company

• Semiconductor Manufacturing
• 700 & Above Employee

• ASIC Emulation Consultant

  • 2010 - 2011



Cadence Design Systems

• United States
• Software Development
• 700 & Above Employee

• Sr. Service Project Manager - Tech

  • 2004 - 2010

  2008-Present: Vertical Solution Engineering: Responsible for productizing SAS/SATA rate adaptor for Cadence's emulation and acceleration products. Also responsible for implementing new features (3.0 Gbps and 6.0 Gbps speeds) with a Xilinx FPGA design (writing RTLs in Verilog, simulating with NC-SIM and e-test benches, emulating in-circuit with Palladium-II system). 2006-2008: CVA - Silicon Valley: On-site emulation consultant and project manager at NVIDIA, a major CVA's GPU/chipset/handheld customer installation. I provided emulation expertise in porting customer's designs into Palladium systems, in setting up hardware components for emulation, and in debugging emulation-related issues with in-circuit bringup. 2004-2006: CVA - Asia/Pacific Region (China/Taiwan/Korea): I worked closely with the local Sales and FAE team in pre-sale engagements: provided hands-on assistance in completing technical benchmarks. I also trained and assisted local FAEs in all aspects of deploying and supporting Palladium emulation customers in their respective territories. Show less



NXP Semiconductors

• Netherlands
• Semiconductor Manufacturing
• 700 & Above Employee

• IC Verification/Emulation Manager

  • 2001 - 2004

  Leader of a 3-person verification/emulation specialist team which is responsible for setting up and managing all aspects of pre- and post-silicon emulation activities of an advanced Philips' Nexperia platform SOC. I was responsible for integrating validation/emulation into the SOC design flow, for allocating resources, setting up project's milestones and deliverables. I interfaced and managed EDA's vendor relationship (bug fixes/enhancements, HW/SW issues, etc.) and evaluated new verification technologies. Show less



LinkUp Systems Corp.

• Sr. Staff ASIC Verification Engineer

  • 2000 - 2001

  Responsible for verifying USB module of LinkUp's ARM720T-based internet processor. Responsible for writing simulation test cases for RTL in ARM assembly language, setting and running simulation regression, bringing up and debugging ASIC in hardware lab. Responsible for verifying USB module of LinkUp's ARM720T-based internet processor. Responsible for writing simulation test cases for RTL in ARM assembly language, setting and running simulation regression, bringing up and debugging ASIC in hardware lab.



Quickturn Design Systems, Inc.

• FAE Manager

  • 1994 - 2000

  Leader of a 4-person team supporting Silicon Valley Sales in pre- and post-sale technical supports: completing pre-sale benchmarks, and implementing customer's emulation projects. Leader of a 4-person team supporting Silicon Valley Sales in pre- and post-sale technical supports: completing pre-sale benchmarks, and implementing customer's emulation projects.



IBM

• United States
• IT Services and IT Consulting
• 700 & Above Employee

• Staff Design Engineer

  • 1986 - 1992