Experience

PETAiO

• United States
• Semiconductor Manufacturing
• 1 - 100 Employee

• Director of Engineering

  • Dec 2020 - Present

  Product: NVMe/CXL computational SSD/Memory Job contents: - FW/SW team build-up & management - HW/SW co-design architectural exploration for NVMe/SNIA computational storage & CXL Type-2/3 near memory compute - FW/SW/App setup for SOC FPGA system validation - developing host applications for non-volatile CMB/PMR RAM drive - AI models cross-framework conversion & porting for HW accelerator - video transcoding HW/FW function partition - ATE related tasks (package qual., IDDQ, DFT, ATPG, ...) for 12/16nm chip mass production



Solid State System Co Ltd (TPEx stock ID: 3259)

• Taipei

• Department Manager

  • Jul 2009 - Jul 2020

  Product: eMMC/eMCP & NVMe/SATA SSD & voice processor Job contents: - ASIC/HW/FW/SW team build-up & management - voice-interacted processor for microphone array, beamforming, AEC, VAD, CNN keywords spotting KWS - NVMe SSD 3D NAND MLC/TLC FTL firmware implementation - eMMC/eMCP controller & module development from scratch - Got eMMC AVL approval from Hisilicon & Allwinner & Rockchip & Amlogic & Actions, and project database is qualified by US companies - Keep interactions with NAND makers & potential system product producers



ACARD Technology Corp. (TPEx stock ID: 3126)

• Taipei Taiwan

• ASIC senior manager

  • May 2005 - Jun 2009

  Product: SATA/iSCSI RAID Job content: - SATA/iSCSI RAID spec survey - Chip spec initiation (documentation) - RTL design - Simulation Environment Setup - FPGA Verification - Design Synthesis - Test vector environment setup Product: SATA/iSCSI RAID Job content: - SATA/iSCSI RAID spec survey - Chip spec initiation (documentation) - RTL design - Simulation Environment Setup - FPGA Verification - Design Synthesis - Test vector environment setup



GenesysLogic Inc. (TPEx stock ID: 6104)

• Taipei Taiwan

• ASIC project manager

  • Dec 2002 - May 2005

  Product: MIPS SOC, WLAN MAC/BBP, Gigabit Ethernet Switch Job content: - WLAN SOC spec survey - Chip spec initiation (documentation) - RTL design - Simulation Environment Setup - FPGA Verification - Design Synthesis - Test vector environment setup Product: MIPS SOC, WLAN MAC/BBP, Gigabit Ethernet Switch Job content: - WLAN SOC spec survey - Chip spec initiation (documentation) - RTL design - Simulation Environment Setup - FPGA Verification - Design Synthesis - Test vector environment setup



VIA Technologies (TPEx stock ID: 2388)

• Taipei Taiwan

• ASIC section manager

  • Jun 1998 - Dec 2002

  Product: Gigabit Ethernet Switch Job content: - Gigabit Ethernet Switch spec survey - Chip spec initiation (documentation) - RTL design - Simulation Environment Setup - Verification - Design Synthesis - Test vector environment setup Product: Gigabit Ethernet Switch Job content: - Gigabit Ethernet Switch spec survey - Chip spec initiation (documentation) - RTL design - Simulation Environment Setup - Verification - Design Synthesis - Test vector environment setup