Thinh Ngo, Ph.D.
Instructor at CAN THO UNIVERSITY- Claim this Profile
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Bio
Ramesh Jandhyala
I have worked with Thinh since the time he joined Analog Devices / Mediatek Wireless as a Design Verification Engineer. He worked on core debug and Data Memory verification for various versions of the BlackFin DSP. Thinh shored up quality of the design while a stand-alone SV testbench was being developed. To achieve this, Thinh diligently executed the directed testplan, wrote assertions to check for holes and developed a Perl script to exercise the data memory arbiter. He participated in the debug of the SV testbench and improved it by analyzing coverage and enhancing BFM's to increase locality and types of accesses. He addressed shortcomings in the verification environment by developing checkers for the DMA and memory controller functionality. Thinh volunteers for additional assignments and hence has exposure to various aspects of core verification and debug, like cache coherency and memory synchronization, cache protection, MBIST, JTAG, gate-simulations, and random test debug. He has a good work ethic and would be an asset to a team.
LinkedIn User
Thinh not only completes owned tasks, but also takes initiative to help resolve tasks on critical path. Thinh works hard not only to accomplish individual objectives but also to upgrade skills with modern verification methodology. I am very happy with Thinh’s verification capability and willingness to do extra to get project goal accomplished. Thinh is a great asset of a verification team.
Ramesh Jandhyala
I have worked with Thinh since the time he joined Analog Devices / Mediatek Wireless as a Design Verification Engineer. He worked on core debug and Data Memory verification for various versions of the BlackFin DSP. Thinh shored up quality of the design while a stand-alone SV testbench was being developed. To achieve this, Thinh diligently executed the directed testplan, wrote assertions to check for holes and developed a Perl script to exercise the data memory arbiter. He participated in the debug of the SV testbench and improved it by analyzing coverage and enhancing BFM's to increase locality and types of accesses. He addressed shortcomings in the verification environment by developing checkers for the DMA and memory controller functionality. Thinh volunteers for additional assignments and hence has exposure to various aspects of core verification and debug, like cache coherency and memory synchronization, cache protection, MBIST, JTAG, gate-simulations, and random test debug. He has a good work ethic and would be an asset to a team.
LinkedIn User
Thinh not only completes owned tasks, but also takes initiative to help resolve tasks on critical path. Thinh works hard not only to accomplish individual objectives but also to upgrade skills with modern verification methodology. I am very happy with Thinh’s verification capability and willingness to do extra to get project goal accomplished. Thinh is a great asset of a verification team.
Ramesh Jandhyala
I have worked with Thinh since the time he joined Analog Devices / Mediatek Wireless as a Design Verification Engineer. He worked on core debug and Data Memory verification for various versions of the BlackFin DSP. Thinh shored up quality of the design while a stand-alone SV testbench was being developed. To achieve this, Thinh diligently executed the directed testplan, wrote assertions to check for holes and developed a Perl script to exercise the data memory arbiter. He participated in the debug of the SV testbench and improved it by analyzing coverage and enhancing BFM's to increase locality and types of accesses. He addressed shortcomings in the verification environment by developing checkers for the DMA and memory controller functionality. Thinh volunteers for additional assignments and hence has exposure to various aspects of core verification and debug, like cache coherency and memory synchronization, cache protection, MBIST, JTAG, gate-simulations, and random test debug. He has a good work ethic and would be an asset to a team.
LinkedIn User
Thinh not only completes owned tasks, but also takes initiative to help resolve tasks on critical path. Thinh works hard not only to accomplish individual objectives but also to upgrade skills with modern verification methodology. I am very happy with Thinh’s verification capability and willingness to do extra to get project goal accomplished. Thinh is a great asset of a verification team.
Ramesh Jandhyala
I have worked with Thinh since the time he joined Analog Devices / Mediatek Wireless as a Design Verification Engineer. He worked on core debug and Data Memory verification for various versions of the BlackFin DSP. Thinh shored up quality of the design while a stand-alone SV testbench was being developed. To achieve this, Thinh diligently executed the directed testplan, wrote assertions to check for holes and developed a Perl script to exercise the data memory arbiter. He participated in the debug of the SV testbench and improved it by analyzing coverage and enhancing BFM's to increase locality and types of accesses. He addressed shortcomings in the verification environment by developing checkers for the DMA and memory controller functionality. Thinh volunteers for additional assignments and hence has exposure to various aspects of core verification and debug, like cache coherency and memory synchronization, cache protection, MBIST, JTAG, gate-simulations, and random test debug. He has a good work ethic and would be an asset to a team.
LinkedIn User
Thinh not only completes owned tasks, but also takes initiative to help resolve tasks on critical path. Thinh works hard not only to accomplish individual objectives but also to upgrade skills with modern verification methodology. I am very happy with Thinh’s verification capability and willingness to do extra to get project goal accomplished. Thinh is a great asset of a verification team.
Experience
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CAN THO UNIVERSITY
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Vietnam
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Education Administration Programs
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100 - 200 Employee
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Instructor
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Oct 2022 - Present
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Radiance Technologies
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United States
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Defense and Space Manufacturing
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700 & Above Employee
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Principal 5G Architect
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Feb 2021 - Apr 2022
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Broadcom
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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Principal Design Verification Engineer
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Nov 2013 - Apr 2017
Verified 40/100G Lite-PHYs.(IEEE 802-3bj compliant physical layer devices) including ARM Cortex-M0 subsystems and firmware. Verified 40/100G Lite-PHYs.(IEEE 802-3bj compliant physical layer devices) including ARM Cortex-M0 subsystems and firmware.
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NXP acquires Freescale Semiconductor
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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Design Verification Engineer
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Mar 2011 - Nov 2013
Participated in the verification of advanced IO processors and multi-core platforms comprising of DSPs, PowperPCs, coherent memories and IOs.Tasks include:• Implemented an UVM block testbench to verify Packet Express Buffer Memory• Implemented an UVM register layering for AXI-bus registers• Managed and enhanced Peripheral Access Management Unit block testbench. • Written and executed verification plans• Developed directed and random testcases per verification plans• Managed regression and debugged fails• Performed coverage-driven verification
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Design Verification Engineer
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Sep 2006 - Mar 2011
Verified high-performance digital signal processors (DSPs)Accomplishments include: • Verified data memory unit (DMU) cache/sram, performance monitor unit and memory built-in self-test (MBIST)• Developed DMU SystemVerilog unit testbench• Written directed testcases and assertions (SVAs)• Analyzed and enhanced code and functional coverage• Regressed and debugged failed testcases (RTL, gate and sdf)• Maintained and enhanced automatic test generator• Developed Certitude-like tool to qualify design verification environment• Developed test configurability• Developed end-to-end DMA checker using VMM • Enhanced DMU unit testbench with locality and multi-level constraints
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Education
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2017 - 2021
The University of Texas at San Antonio
Doctor of Philosophy - PhD, Computer and Electrical Engineering -
1984 - 1988
Stanford University
MS, Electrical Engineering -
1980 - 1984
Oklahoma State University
BS, Electrical Engineering -
2017 - 2021
The University of Texas at San Antonio
Doctor of Philosophy - PhD, Electrical, Electronics and Communications Engineering -
2017 - 2021
The University of Texas at San Antonio
Doctor of Philosophy - PhD, Electrical Engineering
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