Jay Sharma
Project Manager at Natron- Claim this Profile
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Bio
Experience
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Natron
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United States
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Solar Electric Power Generation
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1 - 100 Employee
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Project Manager
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Feb 2023 - Present
• Started the journey as a Project Manager by handling 5 clients and leading a team of 6 people.
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Senior Design Engineer
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Jul 2022 - Jan 2023
• Successfully handling 4 clients. Leading a team of 4 Designers to deliver quality work to Clients.• Working on One 4.3MW PV Project and Six 500+ KW PV and ESS Projects and getting One Off-Grid Greenhouse Farm Facility close to permit phase including providing responses to AHJs/Inspectors and reviewing equipment and wires submittals.
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Design Engineer
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Oct 2020 - Jun 2022
• Lead team of 3 Junior Designers and Trained Interns during this whole 21 month duration.• Successfully handled 2 Client in addition to one Residential scale projects based Client.• Completed full designs of 35+ PV and ESS Commercial Projects based in California ranging from 200KW to 1.3MW• Completed & Worked on PV projects including Service Upgrades and EV Chargers.• Completed 50+ Residential projects based in California, Arizona and Ohio of PV+ ESS and Electrical Lighting Configurations.• Worked on Complete Electrical Design of a 60 Greenhouses Cannabis Farm based in Korbel, California. Electrical Design included Lighting Fixture Scheduling, Panels Scheduling, Load Capacity Analysis and preparing Ceiling plan and Power plan for a Employee Breakroom. Show less
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Designer (Trainee)
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Jul 2020 - Sep 2020
• As an Intern worked on different types of PV systems e.g. Microinverter based, String Inverters, String Inverters with Rapid Shutdown Devices and Optimizers.• Undergone training in different Softwares for Designing & Calculations like AutoCAD, Microsoft Excel, PVsyst and Helioscope.
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Yoctozant Technologies
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India
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Semiconductor Manufacturing
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1 - 100 Employee
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Design Verification (DV) Intern
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Apr 2019 - Aug 2019
• AMBA AHB (Advanced Microcontroller Bus Architecture - Advanced High-Performance Bus) Verified functioning of a Memory Cell using the AMBA AHB protocol through Verilog Hardware Description Language. • FIFO (Asynchronous & Synchronous) First In First out Memory Bus Operation verified with Verilog Hardware Description Language Test-cases. Testbenches. • AMBA AHB (Advanced Microcontroller Bus Architecture - Advanced High-Performance Bus) Verified functioning of a Memory Cell using the AMBA AHB protocol through Verilog Hardware Description Language. • FIFO (Asynchronous & Synchronous) First In First out Memory Bus Operation verified with Verilog Hardware Description Language Test-cases. Testbenches.
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Education
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Dayalbagh Educational Institute
Master of Business Administration - MBA, Busniess Management -
Dayalbagh Educational Institute
Bachelor of Technology, Electrical Engineering