Swapnil Sunil Roge
Research Assistant (Wissenschaftlicher Mitarbeiter) at Institute of Robust Power Semiconductor Systems | ILH- Claim this Profile
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English Full professional proficiency
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Hindi Native or bilingual proficiency
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Marathi Native or bilingual proficiency
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German Limited working proficiency
Topline Score
Bio
Credentials
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Learn VHDL and FPGA Development
UdemyJan, 2023- Oct, 2024 -
Machine Learning A-Z: Hands-On Python & R In Data Science
UdemyJul, 2020- Oct, 2024 -
Java Programming Masterclass for Software Developers
UdemyJan, 2020- Oct, 2024 -
Mastering Microcontroller with Embedded Driver Development
UdemyNov, 2019- Oct, 2024 -
Programming, Data Structures and Algorithms in Python
NPTELJul, 2016- Oct, 2024 -
The Web Developer Bootcamp
Udemy
Experience
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Institute of Robust Power Semiconductor Systems | ILH
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Germany
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Research Services
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1 - 100 Employee
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Research Assistant (Wissenschaftlicher Mitarbeiter)
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Jun 2023 - Present
1) Tentative Thesis Topic: Predictive Control of Power Electronic Subsystems for E-Mobility.2) Optimization of lifespan, efficiency and service intervals of power electronic subsystems deployed within the drivetrain of electric vehicles.3) Achieving aforementioned goals by developing predictive control systems for power electronics.
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Studentische Hilfskraft (HIWI) for EIVE-T Project
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Feb 2022 - May 2023
1) FPGA-SoC development involving interfacing of AD9082 RF ADC & DAC evaluation board with Thales Alenia Space multiMIND payload processing computer based on Xilinx Zynq Ultrascale+ FPGA-SoC.2) Setting up JESD204B IP core to allow ADC/DAC operation in the Gbps range.3) Performing the IQ data sample mapping for the corresponding JESD204B mode.4) More information: www.ilh.uni-stuttgart.de/en/research/mmw/EIVE-T/
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Studentische Hilfskraft (HIWI) for LETSCOPE Project
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Jul 2021 - May 2023
1) Embedded firmware and driver development of an STM32 micro-controller based data acquisition system for characterisation of SiC MOSFETS using gate-drivers.2) Implementation of communication interface between STM32 micro-controllers and dSPACE MicroLabBox.3) Version control using GitHub desktop.4) More information: www.ilh.uni-stuttgart.de/en/research/pe/ICM-LETSCOPE/
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Master Thesis Student
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Nov 2022 - Apr 2023
Topic: Digital Self-Interference Cancellation using FPGA for In-Band Full-Duplex Radios1) Simulation of self-interference effect in RX signal for in-band full-duplex wireless communication systems.2) Designing adaptive FIR filters (based on LMS, NLMS and RLS algorithms) for suppressing the self-interference signal from the RX signal.3) Development, implementation & testing of self-interference cancellation AXI Stream IP cores on Thales Alenia Space multiMIND payload processing computer based on Xilinx Zynq Ultrascale+ FPGA-SoC interfaced with AD9174 RF DAC.4) Performing comparative analysis of the developed self-interference cancellation IP cores. Show less
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Forschungsarbeit (Research Project) Student
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Apr 2022 - Oct 2022
Topic: Quasi-Realtime Self-Mixing FMCW Radar Signal Processing Implementation using FPGA1) FPGA-SoC development and hardware-software partitioning of a quasi-realtime system which determines the beat frequency from the IF signal of a novel self-mixing FMCW radar.2) Designing algorithm for time-domain extraction of beat signal from IF signal.3) Estimating beat frequency from the extracted beat signal using xFFT LogiCORE IP core.4) Setting up communication interface between the Xilinx Zynq-7000 SoC FPGA and the PC using UART.5) Plotting the extracted time domain beat signal with its corresponding FFT on PC using Python Matplotlib.6) Analysis of the developed system using test signals from Keysight M8195A RF AWG. 7) Result: The developed system performed accurate beat frequency estimation from IF signals with SNR greater than 12.04 dB.8) More information: www.ilh.uni-stuttgart.de/en/research/mmw/MIRADOR/ Show less
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Studentische Hilfskraft (HIWI) for EIVE Project
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Oct 2021 - Feb 2022
1) Implementation of different JESD204B modes in AD9174 RF DAC used for EIVE satellite mission.2) Configuration of dynamic lane rate for JESD204B IP core to allow real-time modification of the lane rate from 8.25 to 11.5 Gbps.3) More information: www.ilh.uni-stuttgart.de/en/research/mmw/EIVE/
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Indian Institute of Technology, Bombay
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India
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Higher Education
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700 & Above Employee
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Senior Project Technical Assistant
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Mar 2020 - Feb 2021
1) Designed a TI micro-controller based evaluation board with functionalities such as in-built arbitrary waveform generator, digital storage oscilloscope, frequency response plotter, IV and CV characteristics plotter.2) Performed the embedded firmware and driver development and analog hardware development of the aforementioned board. 3) Designed PCB using Eagle.4) Developed a cross platform GUI using Python Tkinter and Matplotlib.5) Project Link: drive.google.com/file/d/1fEss6ok6p6kWVJjm7eLfkmWwC8rzjgmd/view Show less
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Project Technical Assistant
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Jun 2019 - Mar 2020
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Education
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University of Stuttgart
Master of Science, Information Technology (INFOTECH) -
Dwarkadas J. Sanghvi College of Engineering
Bachelor of Engineering, Electronics and Telecommunication -
Nirmala Memorial Foundation College of Commerce and Science
12th (HSC Maharashtra State Board), Physics, Chemistry, Mathematics, Electrical Maintainance -
St. Xavier's High School
10th (SSC Maharashtra State Board), 92%