Sudhee Bhat

FPGA Design Engineer at Granite River Labs Inc.
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Contact Information
us****@****om
(386) 825-5501
Location
Bengaluru, Karnataka, India, IN
Languages
  • English Native or bilingual proficiency
  • Kannada Native or bilingual proficiency
  • Hindi Native or bilingual proficiency
Skills

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Credentials

  • Learning C
    LinkedIn
    Oct, 2022
    - Oct, 2024
  • FPGA Architecture and Programming using Verilog HDL
    Arm Education and NIELIT Calicut
    Jul, 2022
    - Oct, 2024
  • Cloud Based Analog IC Design Hackathon
    IIT Hyderabad and Synopsys
    Mar, 2022
    - Oct, 2024
  • Digital Circuits
    NPTEL
    Jan, 2021
    - Oct, 2024
  • Microelectronics: Devices to Circuits
    NPTEL
    Jan, 2021
    - Oct, 2024
  • Semiconductor Device and Circuits
    NPTEL
    Jan, 2021
    - Oct, 2024

Experience

  • Granite River Labs Inc.
    • United States
    • IT Services and IT Consulting
    • 100 - 200 Employee
    • FPGA Design Engineer
      • Nov 2022 - Present

      Sideband communication for HDMI & DP PHY Layer for PD Sideband communication for HDMI & DP PHY Layer for PD

  • CDACINDIA
    • India
    • IT Services and IT Consulting
    • 700 & Above Employee
    • RTL/FPGA Design Intern
      • Oct 2021 - Sep 2022

      "Design of AXI4 compliant secure Keccak SHA3 IP Core" Architecture Design and RTL code development for SHA3 that provides hash values of the inputs for the authenticity of the data. The design is tested using a self-checking testbench. "Design of AXI4 compliant secure Keccak SHA3 IP Core" Architecture Design and RTL code development for SHA3 that provides hash values of the inputs for the authenticity of the data. The design is tested using a self-checking testbench.

  • Tata Consultancy Services
    • India
    • IT Services and IT Consulting
    • 700 & Above Employee
    • System Engineer
      • Nov 2017 - Nov 2018

      Worked as Mainframes Developer in COBOL, PL/1 and Python

    • Assistant System Engineer-Trainee
      • Nov 2016 - Nov 2017

      Worked as Mainframes Developer in COBOL, PL/1 and Python

Education

  • Dayananda Sagar College of Engineering, BANGALORE
    Master's degree, VLSI Design and Embedded System
    2020 - 2022
  • CMR Institute Of Technology
    Bachelor's degree, Electronics and Communication Engineering
    2012 - 2016
  • Alva's College of Education
    89.5%
    2010 - 2012
  • New English School, Honnavar
    93.6%
    2009 - 2010

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