siyi qiao
RTL Design Engineer at Cysic- Claim this Profile
Contact Information
us****@****om
(386) 825-5501
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Location
CN
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Experience
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Cysic
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United States
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Blockchain Services
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1 - 100 Employee
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RTL Design Engineer
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Mar 2023 - Present
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NIO蔚来
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China
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Motor Vehicle Manufacturing
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1 - 100 Employee
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工程师
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Jul 2022 - Mar 2023
自动驾驶,人工智能 自动驾驶,人工智能
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Alibaba Cloud
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China
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Software Development
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700 & Above Employee
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工程师
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Apr 2021 - Jul 2022
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5G core network system
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Dec 2020 - Apr 2021
The internship before the full-time job.
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Xilinx
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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reaserch internship
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Sep 2018 - Apr 2020
FPGA based SmartNICes and Switches for Network Measurement, Congestion Control, Accelerating, Traffic Management and P4 compliance Programmable Data Plane FPGA based SmartNICes and Switches for Network Measurement, Congestion Control, Accelerating, Traffic Management and P4 compliance Programmable Data Plane
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Education
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Xi'an Jiaotong University
Ph.d, Ph.D in computer networking architecture. -
Xi'an Jiaotong University
Bachelor of Science (BS), EE
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