Experience

Amazon Robotics
• United States
• Software Development
• 1 - 100 Employee
• Applied Scientist II

  • Dec 2021 - Present


University of Pennsylvania

• United States
• Higher Education
• 700 & Above Employee

• Postdoctoral Researcher

  • Jan 2020 - Dec 2021

  As a postdoc in the GRASP Lab, I get the opportunity to collaborate with many talented undergraduate, Master's, and PhD students on exciting research projects! - Hierarchical optimization-based architectures for multi-robot mission planning, task planning and decision making (using Drake/SNOPT/CVXPY/YALMIP) - Sub-project leader for a multi-institute collaborative effort (see www.dcist.org) leveraging a ROS-based Dockerized environment for full-stack robot swarm simulations in Unity. - Leveraging graph neural networks (GNNs) for multi-agent coordination algorithms under limited and disrupted communications Show less



Georgia Institute of Technology

• United States
• Higher Education
• 700 & Above Employee

• Graduate Research Assistant

  • Jan 2015 - Dec 2019

  - Served as a firmware developer, circuit-board designer for the Robotarium project: an open-access swarm robotics platform at Georgia Tech. - Co-Designer of the Brushbot: a vibration-driven robot designed for large-scale low cost deployment. - Developed an optimization framework for minimum energy task allocation in a team of robots with heterogeneous capabilities - Developed algorithms for distributed density regulation, localization, and task allocation using sparse sensory data - Investigated how concepts from active matter physics can be used to achieve non-uniform densities in robot swarms Show less



Tesla Motors

• Ecuador
• Vehicle Repair and Maintenance
• 1 - 100 Employee

• Autopilot Intern

  • May 2015 - Aug 2015

  • Conceptualized schemes to diagnose anomalous driving conditions and realized them in embedded C. These schemes detect potentially dangerous conditions by taking into account factors such as vehicle dynamics, driver reaction times and current road parameters. • Developed a Simulink based Software-In-Loop simulator to compute these safety performance metrics using raw data collected from test drives. • Implemented MATLAB scripts to automatically facilitate cross-checking of the simulator output with field data and generate statistics to fine tune the design parameters. Show less



Freescale Semiconductor

• Mixed Signal Verification Intern

  • Jan 2014 - Jun 2014

  Full Time Internship - Developed Test cases for the verification of components within a SoC. - Developed automated checker algorithms to verify signal values automatically helping reduce human errors and design times. - Assisted in the development of novel GUI based approach to Mixed Signal Verification. Full Time Internship - Developed Test cases for the verification of components within a SoC. - Developed automated checker algorithms to verify signal values automatically helping reduce human errors and design times. - Assisted in the development of novel GUI based approach to Mixed Signal Verification.



Parikshit Student Satellite Team

• Subsystem Head, Attitude Determination and Control

  • Mar 2011 - Dec 2013

  • Designed and successfully tested a fully autonomous three-axis PID control system for stabilization of the satellite. • Managed a team of 7, supervising and aiding the design of attitude estimation algorithms, orbit determination algorithms, hardware design and system integration. • Designed and developed an integrated satellite environment simulator on MATLAB, featuring modules for torque analysis, performance testing and orbital positioning. The whole system was later implemented in C. • Designed and successfully tested a fully autonomous three-axis PID control system for stabilization of the satellite. • Managed a team of 7, supervising and aiding the design of attitude estimation algorithms, orbit determination algorithms, hardware design and system integration. • Designed and developed an integrated satellite environment simulator on MATLAB, featuring modules for torque analysis, performance testing and orbital positioning. The whole system was later implemented in C.



Bhabha Atomic Research Centre

• Research
• 700 & Above Employee

• Summer Research Intern

  • Jun 2013 - Aug 2013

  • Performed conclusive studies on the feasibility of certain high speed amplifier architectures in CMOS technology for implementation in an ASIC. This involved experimenting with different voltage configurations & designing circuits under extreme power and speed restrictions. • Designed and tested the performance of a two-stage Op-amp in 0.35um CMOS technology using the industry standard Cadence Virtuoso Schematics toolset. • Performed conclusive studies on the feasibility of certain high speed amplifier architectures in CMOS technology for implementation in an ASIC. This involved experimenting with different voltage configurations & designing circuits under extreme power and speed restrictions. • Designed and tested the performance of a two-stage Op-amp in 0.35um CMOS technology using the industry standard Cadence Virtuoso Schematics toolset.