IC design engineer

• Sep 2023 - Present

Masters Student

• Apr 2018 - Aug 2023

Control Microsystems and Microelectronics. Integrated Circuits, Advanced Digital Systems Design, Sensors and Measurement Systems, Microsystems. Master Thesis – Implementation of a 1st order FIR-IIR based Noise-shaping SAR ADC Requirements: Design a transistor-level (except control logic) model of a 1st order NS SAR ADC in accordance with OSR < 16, ENOB > 10, FoM < 190dB in 65nm umc process with a resolution of 10 bits. Includes concepts from SAR ADC and Delta-sigma ADC. Digital domain implementation using Verilog HDL and mixed signal simulation using AMS simulator. Master Project – A 65nm dynamic latch-based comparator Design and characterisation of a dynamic latch-based comparator in 65nm umc process including schematic design, testbench simulations, layout design, DRC, LVS checks using Cadence Virtuoso software. IC project Design of a two stage Miller’s Operational Transconductance Amplifier (OTA) based on gm/Id methodology using LTSpice software Show less

Student Research Assistant

• Oct 2019 - Mar 2022

Worked as a student assistant on Laser Chemical Machining project focussing on MATLAB coding, COMSOL simulation and documentation. Worked as a student assistant on Laser Chemical Machining project focussing on MATLAB coding, COMSOL simulation and documentation.

Oracle Database Administrator

• Sep 2016 - Mar 2018

Worked with administration of enterprise wide Oracle databases on Linux/Unixservers. Handling incident and change management tickets. Standalone databases, RAC, DR.Oracle 11g,12c database installation, patching, upgrades and decommission. OEM agent installation, patching and upgrades. App DBA ,sys DBA.Skills: PL/SQL, Shell scripting, Python.

Graduate Engineering Trainee

• Aug 2015 - Aug 2016

Technological Infrastructure EngineeringITIL certification