Shiuh Choeng Ooi
Senior Application Engineer at Tekmark Sdn Bhd- Claim this Profile
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Bio
Experience
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Tekmark Group
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Malaysia
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Appliances, Electrical, and Electronics Manufacturing
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1 - 100 Employee
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Senior Application Engineer
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Jan 2013 - Present
- Assist the field organization as the “go to” person to exceed sales quota via Pre and Post-sales Technical Support such as: - Demonstration, Product Application, Presentation, Product Training, Testing and Commissioning of test and measurement equipment;- Participate actively in sales process from deal qualification to benchmarking to deal closure;- Owns the deal technical closure;- Be an expert in customer application and competition to identify key technical value differentiators to win deals;- Analyse customer requirements, recommend and find the right solution for the customer;- Be the customer’s “rock”. Handle customer enquiries and solving customers’ technical problems with excellent service to ensure customer satisfaction;- To build up good relationship with customers to enhance customers’ retention;- To carry out other duties or responsibilities assigned from time to time;- Take initiative to continuously improve support services provided to customers.
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IDT - Integrated Device Technology, Inc.(acquired by Renesas)
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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Failure Analysis Engineer
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Jun 2010 - Nov 2012
Perform diagnostic tests on electronic products for failure verification and characterization prior to destructive Failure Analysis such as Curve trace verification, TDR analysis, and CSAM & X-ray analysis.• Familiar in fault isolation techniques to correlate with the electrical failures such as Polarized microscopy analysis, Liquid Crystal analysis, Mico-probing, and Passive Voltage Contrast analysis (PVC) in FESEM.• Gained experiences in layout and schematic tracing using unix system.• Provide failure analysis support to identify root cause of failure for various type of package ICs either in die or package level destructive Failure Analysis such as Chemical decapsulation for internal package analysis, die / package substrate level inspection via Parallel lapping, wet etch and plasma etch, die / package level Cross-section, EDX and FESEM analysis. • Gained experiences in identifying the root cause and the responsibility area for the failures due to any of the Process Chain: Design-Manufacturing(Fab, Assembly, Test, Mark pack)-Shipping-Customer and support in 8D report writing.
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Altera
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United States
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Semiconductors
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700 & Above Employee
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Failure Analysis Engineer
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Jul 2009 - Jul 2010
Performed failure analysis on failed unit devices – die level analysis and proficient in package level analysis • Familiar with the semiconductor manufacturing process flow • Familiar with FA tools and techniques• Machines :- Curve Tracer- Optical microscope- Scanning Acoustic Microscope (SAM) - Scanning Electron Microscope (SEM)- Reactive Ion Etcher (RIE)- X-ray microscope- Energy Dispersive X-ray Spectroscopy (EDX analysis)- Metallography Spesimen Grinding & Polishing Machine- Auto Decaper Machine- Chip Unzip Machine• Techniques :- Sample Die/Package de-processing- Sample polishing skills - Package Cross-sectioning- Precision cutting using circular saw- Acquire good quality of microscopy capturing image
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Education
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Universiti Kebangsaan Malaysia (UKM)
Bachelor of Engineering (B.Eng.), Electrical and Electronics Engineering