Serge Rabyking

Lead Backend Toolchain Developer at ChipFlow
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Contact Information
Location
Loughborough, England, United Kingdom, UK
Languages
  • Belarusian -
  • Russian -
  • English -

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Judd Heape

Serge worked for me as a lead software developer at Apical Imaging from 2011 to 2013. Serge is an extremely talented engineer, researcher and SW designer; he is also one of the most intelligent people that I’ve had the benefit of working with. In particular, his work led to many production-ready shipments of firmware and tools for our world-class ISP IP. He also mentored the team and assisted in talent recruitment over this period. Furthermore, Serge is an excellent problem solver and high-level thinker. He can anticipate, scope and see problems very clearly, and then propose an innovative solution that few others could have conceived. An ideal position for Serge is one that can challenge his intellect and provide him the opportunity to pursue the "new and different". It is within this type of dynamic environment that Serge will continue to do his best work. -Judd Heape former VP, Apical Limited current VP, Qualcomm Technologies, Inc.

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Credentials

  • PRINCE2 Foundation
    -
    Jun, 2012
    - Sep, 2024

Experience

    • United Kingdom
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Lead Backend Toolchain Developer
      • May 2023 - Present
    • Software Development
    • Founder/Owner/Developer
      • Jan 2017 - May 2023

      Business development and all stages of product development up to the production. • Designing and manufacturing electronics. • Firmware development. • Automation software development. • Writing NLP algorithms. • 3D designing and mechanical engineering. • Communication and work with manufacturers. Business development and all stages of product development up to the production. • Designing and manufacturing electronics. • Firmware development. • Automation software development. • Writing NLP algorithms. • 3D designing and mechanical engineering. • Communication and work with manufacturers.

    • United Kingdom
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Principal Software Architect
      • May 2016 - Sep 2016

      • Optimising image processing algorithms. • Implementing math software for polyphase upscale algorithm (Bayer Domain). • Optimising image processing algorithms. • Implementing math software for polyphase upscale algorithm (Bayer Domain).

    • United Kingdom
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Head of IP Development, Software
      • Mar 2013 - May 2016

      • R&D for new algorithms.• Architecture of internal systems and future products.• Improving existing SW/HW architecture.• Developed efficient and light insensitive auto-focus algorithm. • Developed sensor level anti-flicker algorithm (patent WO2016063023A1, US10063787B2).

    • Head of IP Development, Software
      • Mar 2011 - Mar 2013

      • Built ISP Firmware development infrastructure for the company.• Designed firmware architecture with proper partitioning of functionality.• Wrote HAL for ISP and sensors.• Designed and implemented set of tools to automate development processes: – sensor settings sequence compiler – FSM compiler from graphic data modeling to C code. – ISP run-time control software – ISP calibration software• Almost daily interviewed candidates. Built initial firmware team.• Designed and implemented initial versions of firmware algorithms: – Auto Focus – Auto Exposure – Auto White Balance – Digital Image Stabilisation Show less

    • Software Manager
      • Mar 2007 - Mar 2011

      Managed all software development in the company• Invented and implemented tile based image processing architecture featuring – easy pipelining – efficient parallel processing for complex algorithms on systems with limited memory.• Worked on image pipeline compiler from graphical data modeling to C code: – graphical editor for building image processing pipelines – data pipelining and routing C code generation from graphical data – tile based processing C code generation from MATLAB code Show less

    • Embedded Software Developer
      • Mar 2004 - Mar 2007

      • Implementing and optimising image processing algorithms on variety of DSPs and hardware accelerators: – HDR compression – Spacial and Time based noise reduction• Worked with bare-metal hardware• Wrote bootloaders• Worked with ported Linuxes• Designed and implemented sophisticated line based processing architecture featuring: – easy data pipelining – utilizing fast memory with parallel DMA data transfer and interrupt controlling on TI DSPs.• Performed real-time debugging using different kind of communication protocols: JTAG, SWD, UART, I2C• Wrote bit accurate simulators for several HW image processing architectures• Worked with FPGA based emulation HW• Gained basic knowledge of MyHDL, VHDL and SystemC• Worked on optimisation of image processing algorithms, almost twice acceleration with proper CPU cacheutilisation (ARM and MIPS CPUs).For platforms with very limited resources:• wrote tracing mechanism with extremely small bandwidth and recursive message encoding/decoding• wrote fast and compact memory management code as substitute for not available malloc/free Show less

    • United States
    • Software Development
    • Product Manager
      • Sep 2002 - Sep 2004

      • Worked in cooperation with Hardware, Software, Manufacturing and QA departments.• Worked on design and implementation of distributed Telephony system with smart route capabilities: – automatic distribution of audio processing between multiple PCI boards and multiple DSPs on each board. – audio streams routing, forming partial mixes for conferences to avoid echoes• Closely worked with QA department on customer support.• Implemented r1 and r2 signalling protocols.• Implemented fast and efficient code for frequent device re-flashing. Show less

    • Kernel Driver Developer
      • Sep 2000 - Sep 2002

      • Developed all software parts starting from kernel driver up to high level of Telephony API.• Developed all possible testing software for hardware and low level software.• Implemented ISDN protocols according to Q.921 and Q.931 standards.

    • Public Safety
    • 1 - 100 Employee
    • Software Manager
      • Sep 1997 - Sep 2000

      • Built and lead small group of software developers.• Lead development of first world H323 fully ready Telephony system compatible with existing H323 solutionsand billing systems. The system was demonstrated at exhibitions in Las Vegas, USA and Hanover, Germany.• Developed interprocess transport library with universal API used for communication: – through TCP/UDP protocol between multiple computers – inter-process between Apps on the same computer – user-kernel between kernel drivers and user level Apps• Developed fast network distributed database engine. Show less

    • Software Developer
      • Sep 1996 - Sep 1997

      • Windows NT/95 kernel driver development for Telephony ISA/PCI boards.• Database/GUI/Network frameworks development for Telephony system.

Education

  • Loughborough University
    EngD, Logic optimisation (SAT problem)
    2009 - 2014
  • Moscow Institute of Physics and Technology (State University) (MIPT)
    Master of Science (MS), Control and Applied Mathematics
    1991 - 1998

Community

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