Experience

Nuclear Instruments

• Italy
• Research Services
• 1 - 100 Employee

• Senior FPGA Design Engineer

  • Oct 2021 - Present

  Design, verification and validation of large FPGA designs for Physics experiments: data processing, control and communication logic for complex multi-ADC (JESD204B) and multi-board (AURORA) applications. Design, development and validation of control Software. On-board validation and system-level testing. Design, verification and validation of large FPGA designs for Physics experiments: data processing, control and communication logic for complex multi-ADC (JESD204B) and multi-board (AURORA) applications. Design, development and validation of control Software. On-board validation and system-level testing.



Micron Technology

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• System Architect

  • Jan 2021 - Sep 2021

  Modeling and simulation of novel architectures for emerging memory applications.

• Senior Digital Design Engineer

  • Jul 2017 - Dec 2020

  RTL design and functional verification of FPGA-based memory controllers, to test emerging memory systems. On-board validation and Software development. Simulation and verification environment setup.



imec

• United States
• Industrial Machinery Manufacturing
• 1 - 100 Employee

• Research Scientist

  • Jul 2014 - Dec 2016

  Scientific and technical responsible for the FP7 HARPA project. Analysis, modeling and mitigation of BTI-induced degradation in digital circuits, at system-level. Modeling and measuring system-level reliability of complex platforms based on ARM commercial processors. Scientific and technical responsible for the FP7 HARPA project. Analysis, modeling and mitigation of BTI-induced degradation in digital circuits, at system-level. Modeling and measuring system-level reliability of complex platforms based on ARM commercial processors.



Yogitech SpA

• Digital Design Engineer

  • Jan 2013 - Jul 2014

  Maintenance of safety-critical digital IPs based on ARM Cortex-M and Cortex-R processors: bug fix, functional verification and fault-injection campaigns. Design, development and verification of firmware BIST for ARM Cortex-M and Cortex-R processors. Maintenance of safety-critical digital IPs based on ARM Cortex-M and Cortex-R processors: bug fix, functional verification and fault-injection campaigns. Design, development and verification of firmware BIST for ARM Cortex-M and Cortex-R processors.



Chalmers University of Technology

• Sweden
• Research Services
• 700 & Above Employee

• Visiting Researcher

  • Aug 2012 - Dec 2012

  Exploring design challenges and opportunities of DRAM memory controllers for many-core architectures. Exploring design challenges and opportunities of DRAM memory controllers for many-core architectures.



Politecnico di Milano

• Italy
• Research Services
• 700 & Above Employee

• PhD Student

  • Jan 2010 - Dec 2012

  Analysis, modeling and mitigation of time-dependent variability of scaled CMOS technology in high-performance processors. Analysis, modeling and mitigation of time-dependent variability of scaled CMOS technology in high-performance processors.



CEFRIEL

• Italy
• IT Services and IT Consulting
• 100 - 200 Employee

• R&D Engineer

  • Apr 2009 - Dec 2009

  Analysis and optimization of power consumption and Quality-of-Service of nodes within a Wireless Sensor Network. Analysis and optimization of power consumption and Quality-of-Service of nodes within a Wireless Sensor Network.