Sainath Kanaparthi

Layout Design Engineer at Sankalp Semiconductor
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Location
Andhra Pradesh, India, IN

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Experience

    • United States
    • Semiconductor Manufacturing
    • 300 - 400 Employee
    • Layout Design Engineer
      • Oct 2020 - Present

      Worked on WRAPPER and SLDO in TSMC 5nm for AMD. Worked on WRAPPER and SLDO in TSMC 5nm for AMD.

    • India
    • Semiconductors
    • 1 - 100 Employee
    • Layout Design Engineer
      • Mar 2018 - Dec 2019

      I have worked on SERDES and DDR (FinFet 7nm) at client(Cadence design system) location I have worked on SERDES and DDR (FinFet 7nm) at client(Cadence design system) location

Education

  • Sree Chaitanya College of Engineering
    Bachelor of Technology, Electronics and Communication Engineering
    2013 - 2017

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