Sai Tadimeti

Device Support Engineer at BPM Microsystems
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Contact Information
us****@****om
(386) 825-5501
Location
Bengaluru, Karnataka, India, IN
Languages
  • Hindi Elementary proficiency
  • Telugu Native or bilingual proficiency
  • Kannada Native or bilingual proficiency
  • Tamil Elementary proficiency
  • English Full professional proficiency

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Credentials

  • Introduction to Cybersecurity
    Cisco
    Oct, 2022
    - Nov, 2024
  • Wonderware Application Server 2014 R2
    Wonderware West
    Nov, 2015
    - Nov, 2024
  • Analog Systems Designer
    Cranes Software
    Sep, 2012
    - Nov, 2024
  • Embedded Systems Developer
    The Institution of Electronics and Telecommunication Engineers
    Aug, 2012
    - Nov, 2024
  • Ethical Hacker
    Indian Institute of Technology, Bombay
    Mar, 2011
    - Nov, 2024
  • Amateur Robotics
    li2-innovations
    May, 2010
    - Nov, 2024
  • Certified Ethical Hacker (CEH)
    EC-Council
    Dec, 2019
    - Nov, 2024

Experience

    • United States
    • Appliances, Electrical, and Electronics Manufacturing
    • 1 - 100 Employee
    • Device Support Engineer
      • Jan 2018 - Present

    • United States
    • Industrial Machinery Manufacturing
    • 1 - 100 Employee
    • Automation Engineer
      • Jul 2015 - Jan 2018

    • United States
    • Higher Education
    • 700 & Above Employee
    • Instructional Assistant
      • Sep 2013 - May 2015

      The job profile includes1) Assisting the students in their project work.2) Organize the student database (attendance, grades etc)3) Grading the Weekly Progress Reports of the various project teams.

    • Student
      • 2013 - 2015

    • United States
    • Semiconductor Manufacturing
    • 100 - 200 Employee
    • Silicon Design Intern
      • May 2014 - Aug 2014

      1) Careful study and analysis of the Serial Peripheral Interface protocol2) Design of State Machine and RTL Synthesis in Verilog HDL (Xilinx ISE)3) Simulation of various test cases on Xilinx i-Sim 1) Careful study and analysis of the Serial Peripheral Interface protocol2) Design of State Machine and RTL Synthesis in Verilog HDL (Xilinx ISE)3) Simulation of various test cases on Xilinx i-Sim

    • R&D Intern
      • Feb 2013 - Jun 2013

      1) Developing an algorithm to perform Dynamic Weighing2) Exploiting the 8051 architecture and using embedded C to implement the algorithm 1) Developing an algorithm to perform Dynamic Weighing2) Exploiting the 8051 architecture and using embedded C to implement the algorithm

Education

  • University of Houston
    Master of Science (MS), Electrical and Electronics Engineering
    2013 - 2015
  • Visvesvaraya Technological University
    Bachelor of Engineering (BE), Electronics and Communications Engineering
    2009 - 2013

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