Robert Salinas

Quality Assurance Manager at Avalex Technologies Corp.
  • Claim this Profile
Contact Information
us****@****om
(386) 825-5501
Location
US

Topline Score

Topline score feature will be out soon.

Bio

Generated by
Topline AI

You need to have a working account to view this content.
You need to have a working account to view this content.

Experience

    • United States
    • Defense and Space Manufacturing
    • 1 - 100 Employee
    • Quality Assurance Manager
      • Aug 2020 - Present

    • Appliances, Electrical, and Electronics Manufacturing
    • 1 - 100 Employee
    • Quality Manager
      • Sep 2018 - Apr 2020

    • Manufacturing Engineer
      • 2017 - 2018

      • MIL-PRF-38534• Review procedures/documents, drawings and BOMs• Worked on Failure analysis for NPI• Develop automated process for stacked die (GPD/MRSI)• Developed control charts for automate proess• Performed PFMEAs for continuous improvemen

    • Senior Reliability Engineer, Quality Engineer, Manufacturing Engineer
      • Mar 2013 - 2017

      Duties focus on new product introduction (NPI), product qualifications and yield enhancement issues.• Member of the NPI team (review procedures/documents, drawings and BOMs) • Analyze situations, identify problems, and recommend solutions • Compile, analyze and interpret complex data in order to prepare comprehensive reports • Device qualifications • Responsible for vendor compliance to specifications • Continuous improvement • Engineering Change Orders • Lead for in house specialized engineering activities • Process auditing • PFMEA • APQP / ZDP • Internal Audits

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Failure analysis Engineer
      • May 2008 - Nov 2012

      The primary focus was on customer field returns, new product introductions (NPI), product qualifications and yield enhancement issues. An integral part of the copper device team that helped transition Freescale from gold bond wires to copper wire bond technology, worked closely with packaging and reliably engineering to insure stable processes. • Member of the load board design team for failure analysis • Assigned as mentor for new FA engineers • Performed electrical circuit fault isolation for root cause analysis • Performed physical destructive analysis of IC for root cause analysis

    • Failure/Reliability Engineer
      • Apr 2005 - May 2008

      Worked on customer return failures, new product introduction (NPI), and qualification and yield enhancement issues. Worked in reliability performing ESD (HBM CDM, Latch-up) testing and root cause analysis. Was a member of team that worked closely with design in debugging early latch up design issues. Provided marketing with competitive analysis which helped drive strategies and roadmaps. Also a member of the team that transitioned Sigmatel from gold bond wires to copper bond wires. • Worked as FA/reliability engineer to debug early ESD design issues. • Performed FIB circuit edits to prove out design changes • Interfaced with outside vendors and services to insure proper capabilities for analysis. • Performed electrical circuit fault isolation for root cause analysis • Performed physical destructive analysis of IC for root cause analysis

    • Reliability/Failure Analysis Manager
      • 2004 - 2005

      Managed a team of 3 engineers and 3 technicians in the reliability and FA lab. Insured qualification schedules were on keep on schedule, Assigned failure analysis request to engineers and approved final reports. Helped to establish and maintained relationships with key clients. • Managed Burn-In laboratory (Autoclave, tempcycle, THB, HAST, HTOL, reflow oven) • Managed Failure analysis team • Coordinated and prioritize failure analysis requests • Interfaced with customers with regards to ongoing projects

    • United States
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Reliability/Failure Analysis Engineer
      • Feb 2001 - Oct 2003

      CRITERIA LABS, Austin, Texas 02/2001-10/2003 Reliability/FA engineer Performed the duties of reliability and FA engineer. • Root cause analysis of customer returns with final report and findings. • Performed ESD and Latch up testing • Performed FIB circuit edits • Physical top down deprocessing of IC device as well as discrete devices. CRITERIA LABS, Austin, Texas 02/2001-10/2003 Reliability/FA engineer Performed the duties of reliability and FA engineer. • Root cause analysis of customer returns with final report and findings. • Performed ESD and Latch up testing • Performed FIB circuit edits • Physical top down deprocessing of IC device as well as discrete devices.

Education

  • Texas State University
    B.S., Mfg Engr

Community

You need to have a working account to view this content. Click here to join now