Experience

University of Utah

• United States
• Higher Education
• 700 & Above Employee

• Research Assistant

  • Sep 2018 - Present

  Completed 2 generations of Low Phase Noise mmWave PLL designs incorporating bandwidth extension techniques for VCO noise clean-up synthesizing. Completed 2 generations of Low Phase Noise mmWave PLL designs incorporating bandwidth extension techniques for VCO noise clean-up synthesizing.



Analog Bits

• United States
• Semiconductor Manufacturing
• 1 - 100 Employee

• Circuit Design Intern

  • Sep 2022 - Feb 2023

  Feasibility study and design of Ultra-High-Speed SAR-based TI-ADC for next-generation SerDes incorporating support for PAM-4 signaling in advanced FinFet technology. Feasibility study and design of Ultra-High-Speed SAR-based TI-ADC for next-generation SerDes incorporating support for PAM-4 signaling in advanced FinFet technology.



University of Utah

• United States
• Higher Education
• 700 & Above Employee

• Graduate Teaching Assistant

  • Jan 2018 - May 2018

  Teaching Undergraduate students to perform lab activities of Digital System Design. Teaching Undergraduate students to perform lab activities of Digital System Design.



onsemi

• United States
• Semiconductors
• 700 & Above Employee

• Analog Design Intern

  • May 2017 - Aug 2017

  Design of a high accuracy oscillator and characterization of various cells (ADC, Voltage regulator, OTA, etc). Design of a high accuracy oscillator and characterization of various cells (ADC, Voltage regulator, OTA, etc).



ISRO - Indian Space Research Organization

• India
• Defense and Space Manufacturing
• 700 & Above Employee

• Project Intern

  • Jan 2016 - May 2016

  Designed of an Automatic Modulation Detection tool using Artificial neural networks Matlab and implemented same without ANN on an FPGA using Verilog. Achieved an accuracy of 99.4% while detecting over 11 different modulation schemes with signals having SNR as low as -11db. Designed of an Automatic Modulation Detection tool using Artificial neural networks Matlab and implemented same without ANN on an FPGA using Verilog. Achieved an accuracy of 99.4% while detecting over 11 different modulation schemes with signals having SNR as low as -11db.



Bharat Sanchar Nigam Limited

• Telecommunications
• 700 & Above Employee

• Trainee

  • Jan 2015 - Jan 2015

  Trained in basics of the protocols used in modern communication systems. Trained in basics of the protocols used in modern communication systems.