Pong Tang L.

Corporate Application Engineer at OneSpin: A Siemens Business
  • Claim this Profile
Contact Information
us****@****om
(386) 825-5501
Location
DE

Topline Score

Topline score feature will be out soon.

Bio

Generated by
Topline AI

You need to have a working account to view this content.
Join now
You need to have a working account to view this content.
Join now

Credentials

  • Sequences, Time Series and Prediction
    Coursera
    Sep, 2019
    - Nov, 2024
  • TensorFlow in Practice Specialization
    Coursera
    Sep, 2019
    - Nov, 2024
  • Convolutional Neural Networks in TensorFlow
    Coursera
    Aug, 2019
    - Nov, 2024
  • Natural Language Processing in TensorFlow
    Coursera
    Aug, 2019
    - Nov, 2024
  • Introduction to TensorFlow for Artificial Intelligence, Machine Learning, and Deep Learning
    Coursera
    Jul, 2019
    - Nov, 2024
  • Machine Learning
    Coursera
    May, 2019
    - Nov, 2024

Experience

  • OneSpin: A Siemens Business
    • Germany
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Corporate Application Engineer
      • Feb 2021 - Present

      - Formal verification project on customers' processor design - Commercialisation of formal verification apps - Revision on training materials/demos - Formal verification project on customers' processor design - Commercialisation of formal verification apps - Revision on training materials/demos

  • Cirrus Logic
    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Design Verification Engineer
      • Jan 2020 - Dec 2020

      • Chip level verification on mixed-signal products• Built UVM verification IP to verify the clock module with assertion based method• Developed and maintained mixed-signal verification libraries• JasperGold formal verification on IPs• Used Incisive Formal Verification tool by Cadence to formally verify connectivity of the device• Python, Ruby, Tcl for test scripting

    • Validation Engineer
      • Sep 2016 - Jan 2020

      • Joined as a graduate engineer, involved in post-silicon validation work on mixed-signal products, responsible for test design, test planning and test automation with languages like LabVIEW, TestStand and C++. • Working with high independence and self-discipline in several US based projects • Develop and maintain FPGA images of of the validation platform with Synplify Pro and Vivado. • Placement at the software research team to shorten data loading time by building a database to for quick file name look up, with MongoDB in Python • Placement at the Analog design team to investigate the property of gate leakage with Virtuoso

  • ASM
    • Netherlands
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Engineering Intern
      • Jul 2013 - Sep 2013

      Justified the performance (processing power, communication speed, error rate) of a newly released development board, Beaglebone Black, and its value as a MCU in the company’s products (IC packaging machines, die bonders, etc.). Developed a C++ tool set for data logging and analysis Justified the performance (processing power, communication speed, error rate) of a newly released development board, Beaglebone Black, and its value as a MCU in the company’s products (IC packaging machines, die bonders, etc.). Developed a C++ tool set for data logging and analysis

Education

  • University of Cambridge
    Master of Engineering - MEng, Electrical and Electronics Engineering
    2012 - 2016
  • Queen Ethalburga's College
    GCE A-level, Physical Sciences
    2010 - 2012

Community

You need to have a working account to view this content. Click here to join now