Peter Vis
R&D Engineer at imec the Netherlands- Claim this Profile
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Dutch Native or bilingual proficiency
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English Full professional proficiency
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Bio
Gert Jan Van Schaik
In the role of technical lead, I worked together with Peter for a year and a half. It was very nice having him in the team because he was an independent and quick learning colleague. For the given tasks he arranged everything necessary to get them done quickly. Peter worked on a lot of different tasks like RTL ASIC development, RTL verification, porting an ASIC to an FPGA platform and writing Python code. In short, he is a good team worker, and he will help drive a project forward.
Herman Luijmes
I have worked more than 5 years closely together with Peter. First of all Peter is a great collegue with posititve working attitude and good social skills; he will easily adjust into a team. In his work he is always looking for improvements and exploring possibilities to do things more efficiently (e.g. he automated a complete characterization flow for complex I/O-cells that were done manually in the past. The gain in quality, coverage and througput time was huge). He takes initiative to create required contacts to gain required knowledge and expand his own. Peter is eager to stay up to date with the latest developments and picks up new things easily. Has been a great time working with him
Gert Jan Van Schaik
In the role of technical lead, I worked together with Peter for a year and a half. It was very nice having him in the team because he was an independent and quick learning colleague. For the given tasks he arranged everything necessary to get them done quickly. Peter worked on a lot of different tasks like RTL ASIC development, RTL verification, porting an ASIC to an FPGA platform and writing Python code. In short, he is a good team worker, and he will help drive a project forward.
Herman Luijmes
I have worked more than 5 years closely together with Peter. First of all Peter is a great collegue with posititve working attitude and good social skills; he will easily adjust into a team. In his work he is always looking for improvements and exploring possibilities to do things more efficiently (e.g. he automated a complete characterization flow for complex I/O-cells that were done manually in the past. The gain in quality, coverage and througput time was huge). He takes initiative to create required contacts to gain required knowledge and expand his own. Peter is eager to stay up to date with the latest developments and picks up new things easily. Has been a great time working with him
Gert Jan Van Schaik
In the role of technical lead, I worked together with Peter for a year and a half. It was very nice having him in the team because he was an independent and quick learning colleague. For the given tasks he arranged everything necessary to get them done quickly. Peter worked on a lot of different tasks like RTL ASIC development, RTL verification, porting an ASIC to an FPGA platform and writing Python code. In short, he is a good team worker, and he will help drive a project forward.
Herman Luijmes
I have worked more than 5 years closely together with Peter. First of all Peter is a great collegue with posititve working attitude and good social skills; he will easily adjust into a team. In his work he is always looking for improvements and exploring possibilities to do things more efficiently (e.g. he automated a complete characterization flow for complex I/O-cells that were done manually in the past. The gain in quality, coverage and througput time was huge). He takes initiative to create required contacts to gain required knowledge and expand his own. Peter is eager to stay up to date with the latest developments and picks up new things easily. Has been a great time working with him
Gert Jan Van Schaik
In the role of technical lead, I worked together with Peter for a year and a half. It was very nice having him in the team because he was an independent and quick learning colleague. For the given tasks he arranged everything necessary to get them done quickly. Peter worked on a lot of different tasks like RTL ASIC development, RTL verification, porting an ASIC to an FPGA platform and writing Python code. In short, he is a good team worker, and he will help drive a project forward.
Herman Luijmes
I have worked more than 5 years closely together with Peter. First of all Peter is a great collegue with posititve working attitude and good social skills; he will easily adjust into a team. In his work he is always looking for improvements and exploring possibilities to do things more efficiently (e.g. he automated a complete characterization flow for complex I/O-cells that were done manually in the past. The gain in quality, coverage and througput time was huge). He takes initiative to create required contacts to gain required knowledge and expand his own. Peter is eager to stay up to date with the latest developments and picks up new things easily. Has been a great time working with him
Credentials
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Principles of Computing (Part 2) - Coursera
Rice UniversitySep, 2016- Oct, 2024 -
Principles of Computing (Part 1) - Coursera
Rice UniversityJun, 2016- Oct, 2024 -
An Introduction to Interactive Programming in Python (Part 2) - Coursera
Rice UniversityMar, 2016- Oct, 2024 -
An Introduction to Interactive Programming in Python (Part 1) - Coursera
Rice UniversityFeb, 2016- Oct, 2024 -
Digital Signal Processing - Coursera
EPFL (École polytechnique fédérale de Lausanne)Jan, 2016- Oct, 2024
Experience
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imec the Netherlands
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Netherlands
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Nanotechnology Research
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1 - 100 Employee
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R&D Engineer
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Oct 2018 - Present
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Digital ASIC Designer (via Alten)
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Sep 2016 - Sep 2018
Design and verification of digital modules for multisensor biomedical sensor ICs and an ultra low power digital basebands. Next to that working on the development of power management IP.
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Alten Nederland
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Netherlands
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IT Services and IT Consulting
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300 - 400 Employee
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Consultant Mechatronics
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Sep 2013 - Sep 2018
As a consultant I am involved in R&D projects within the field of mechatronics and robotics. With my knowledge and expertise I help the customers from Alten Mechatronics in solving their High Tech challenges. As a consultant I am involved in R&D projects within the field of mechatronics and robotics. With my knowledge and expertise I help the customers from Alten Mechatronics in solving their High Tech challenges.
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Digital ASIC Designer wireless (via Alten)
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Jul 2014 - Mar 2016
As digital hardware designer responsible for the design and verification of digital basebands and digital front-ends of radio ICs. The chips support standards like Bluetooth, 802.15.4 and 802.11ah. Next to this also involved in FPGA prototyping and chip bring-up. As digital hardware designer responsible for the design and verification of digital basebands and digital front-ends of radio ICs. The chips support standards like Bluetooth, 802.15.4 and 802.11ah. Next to this also involved in FPGA prototyping and chip bring-up.
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Senior Engineer (via Alten)
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Mar 2014 - Apr 2014
Worked on the design and tape-out of several test chips for a project working on the development of a MEMS (Micro ElectroMechanical System) based medical product. Worked on the design and tape-out of several test chips for a project working on the development of a MEMS (Micro ElectroMechanical System) based medical product.
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Synopsys Inc
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United States
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Software Development
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700 & Above Employee
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Senior R&D Engineer
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Nov 2009 - Aug 2013
Within the MSIP Business Unit from Synopsys working on the development of GPIO (General Purpose I/O) libraries in the latest process technologies. Involved in the complete design cycle from specification to release to the customer. Within the MSIP Business Unit from Synopsys working on the development of GPIO (General Purpose I/O) libraries in the latest process technologies. Involved in the complete design cycle from specification to release to the customer.
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NXP Semiconductors
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Netherlands
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Semiconductor Manufacturing
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700 & Above Employee
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Mixed Signal Design Engineer
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Jan 2008 - Nov 2009
Responsible for the development of GPIO libraries within the central R&D organization of NXP. Work includes both schematic and layout design of IO cells and the design of several test chips. Responsible for the development of GPIO libraries within the central R&D organization of NXP. Work includes both schematic and layout design of IO cells and the design of several test chips.
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Alewijnse Marine
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France
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Construction
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Trainee
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May 2006 - Dec 2007
Building and testing of IP data networks, CCTV- and entertainment systems intended for luxurious yachts. Next to this I was also involved in commissioning and servicing of these systems on location. Building and testing of IP data networks, CCTV- and entertainment systems intended for luxurious yachts. Next to this I was also involved in commissioning and servicing of these systems on location.
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Graduation Project
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Jan 2005 - Jun 2005
Design of an intelligent motor control. The project was a combination of the development of a DSP hardware platform and a control algorithm implemented in C. Design of an intelligent motor control. The project was a combination of the development of a DSP hardware platform and a control algorithm implemented in C.
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Education
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2001 - 2005
Avans University of Applied Sciences
Bachelor of Engineering (BEng), Electrical and Electronical Engineering -
2004 - 2004
Trier University of Applied Sciences
Advanced Logic in Control Engineering -
2003 - 2003
Copenhagen University College of Engineering
European Project Semester
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