Experience

Polytech Marseille

• France
• Higher Education
• 1 - 100 Employee

• Temporary research and teaching assistant (ATER)

  • Oct 2021 - Present



Institut Fresnel

• France
• Research Services
• 1 - 100 Employee

• PHD Researcher

  • Mar 2018 - Present

  Conducting research as a non-permanent member of the team "Groupe Signaux Multidimensionnels (GSM) of the "Institut Fresnel", as part of my thesis on multiple access solutions and channel modeling for optical wireless communications (OWC)-based Intra-wireless body area networks (WBAN) links. Conducting research as a non-permanent member of the team "Groupe Signaux Multidimensionnels (GSM) of the "Institut Fresnel", as part of my thesis on multiple access solutions and channel modeling for optical wireless communications (OWC)-based Intra-wireless body area networks (WBAN) links.



Czech Technical University in Prague

• Czechia
• Higher Education
• 700 & Above Employee

• Invited Researcher

  • Sep 2019 - Jan 2020

  4 months Secondment to work on channel modeling for optical WBANs as part of my thesis 4 months Secondment to work on channel modeling for optical WBANs as part of my thesis



Ecole Nationale Polytechnique

• Algeria
• Higher Education
• 100 - 200 Employee

• Summer Internship

  • Jul 2017 - Oct 2017

  Design of a variety of analog and digital circuits.Preparing manipulations for first-year students. Design of a variety of analog and digital circuits.Preparing manipulations for first-year students.



Centre de Développement des Technologies Avancées (CDTA)

• Algeria
• Research Services
• 200 - 300 Employee

• Research Intern

  • Feb 2017 - Jul 2017

  Conducting research and development as an intern with the ARFIC (Analog& Radio Frequency Integrated circuits) team of CDTA. The main tasks were:- Design of a phase-locked loop (PLL) frequency synthesizer on CMOS 0.18 µm process.- A training on IC design flow based on the Cadence design tools: Virtuoso and Encounter. Conducting research and development as an intern with the ARFIC (Analog& Radio Frequency Integrated circuits) team of CDTA. The main tasks were:- Design of a phase-locked loop (PLL) frequency synthesizer on CMOS 0.18 µm process.- A training on IC design flow based on the Cadence design tools: Virtuoso and Encounter.



centrelec algerie

• Automation Machinery Manufacturing
• 1 - 100 Employee

• Engineer Intern

  • Jun 2016 - Sep 2016

  Working on external memories interfacing with STM32F4 microcontroller for industrial applications Working on external memories interfacing with STM32F4 microcontroller for industrial applications



icosnet

• Algeria
• Telecommunications
• 100 - 200 Employee

• Engineer Intern

  • Dec 2015 - Jan 2016

  Implementing a VoIP network based on Asterisk. Implementing a VoIP network based on Asterisk.