Experience

Sintegra Inc.

• United States
• Semiconductor Manufacturing
• 1 - 100 Employee

• Sr. Staff Physical Design Engineer

  • Sep 2018 - Present

  Place and Route in 7nm FinFET for High Speed DSP PHY block from RTL to GDSII. Resolved congestion issues. Debugged timing constraints to improve 63% total negative slack. Place and Route in 7nm FinFET for High Speed DSP PHY block from RTL to GDSII. Resolved congestion issues. Debugged timing constraints to improve 63% total negative slack.



Qualcomm, Inc.

• Physical Design Engineer (Contractor)

  • Sep 2016 - Sep 2018

  Place and Route in 7nm and 10nm FinFET for High Speed Serdes Digital Blocks PHY top level integration, timing closure, Redhawk, physical verification. Wrote and presented 7nm and 10nm tcl script from LEF to Floorplan including rectilinear FP shapes, Horizontal/Vertical Segments and Pins checks Place and Route in 7nm and 10nm FinFET for High Speed Serdes Digital Blocks PHY top level integration, timing closure, Redhawk, physical verification. Wrote and presented 7nm and 10nm tcl script from LEF to Floorplan including rectilinear FP shapes, Horizontal/Vertical Segments and Pins checks



Analogmacro

• Design Engineer

  • Jul 2014 - Sep 2016

  Custom analog macro IP development Custom analog macro IP development



Broadcom

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Senior Staff IC Design Engineer

  • Apr 2011 - Jul 2014

  Block level PnR, cross-talk noise/glitch circuits detection/flow, DC threshold flow, Aging and I/O padring hspice simulation Block level PnR, cross-talk noise/glitch circuits detection/flow, DC threshold flow, Aging and I/O padring hspice simulation



Cadence Design Systems

• United States
• Software Development
• 700 & Above Employee

• Principal Design Engineer

  • Jan 2000 - Jan 2010



NEC Electronics

• Japan
• Semiconductors
• 100 - 200 Employee

• Circuit Design Engineer

  • Aug 1998 - Jan 2000



Cirrus Logic

• United States
• Semiconductor Manufacturing
• 700 & Above Employee

• Circuit Design Engineer

  • Apr 1995 - Aug 1998



ESS Technology, Inc.

• Semiconductor Manufacturing
• 100 - 200 Employee

• Circuit Design Engineer

  • Jun 1994 - Apr 1995