Experience

SK siltron css

• United States
• Semiconductor Manufacturing
• 1 - 100 Employee

• Sales and Technical Support manager

  • Mar 2021 - Present



CALY Technologies

• France
• Semiconductor Manufacturing
• 1 - 100 Employee

• Product Development and Industrialization manager

  • Aug 2018 - Mar 2021

  - Product development and Industrialization of SiC power devices for protection (CLD, TVS) and conversion (Diode, transistors) applications. - Device design team management. - Wafer Level measurement team management. - Management of device development batches to mass production in foundries. - Management of packaging supply and development. - Management of spécifications setup for product qualification. - Product development and Industrialization of SiC power devices for protection (CLD, TVS) and conversion (Diode, transistors) applications. - Device design team management. - Wafer Level measurement team management. - Management of device development batches to mass production in foundries. - Management of packaging supply and development. - Management of spécifications setup for product qualification.



Ascatron AB

• Sweden
• Semiconductor Manufacturing
• 1 - 100 Employee

• Senior R&D engineer / SiC power devices

  • Jan 2016 - Jun 2018

  - Responsible of the electrical measurement lab. - Design improvement of developed power devices. - Evaluation and qualification of 4H-SiC power devices. - Process development of technological bricks. - Responsible of the electrical measurement lab. - Design improvement of developed power devices. - Evaluation and qualification of 4H-SiC power devices. - Process development of technological bricks.



INSA Lyon - Institut National des Sciences Appliquées de Lyon

• France
• Higher Education
• 700 & Above Employee

• Power devices designer - Post-doctoral position

  • Jul 2014 - Jan 2016

  Wide band gap semiconductor (GaN, 4H-SiC) devices design and applications Main project: TOURS2015 -> study and development of innovative 600 V / 1200 V GaN/Si Schottky rectifier architectures My work: development of simulation tools, 2D and 3D simulations by finite elements method of Schottky rectifier, fabrication of test structures Wide band gap semiconductor (GaN, 4H-SiC) devices design and applications Main project: TOURS2015 -> study and development of innovative 600 V / 1200 V GaN/Si Schottky rectifier architectures My work: development of simulation tools, 2D and 3D simulations by finite elements method of Schottky rectifier, fabrication of test structures



Kyoto University

• Japan
• Research Services
• 700 & Above Employee

• Material science research engineer - Post-doctoral position

  • Jul 2013 - Jun 2014

  4H-SiC material characterization for high voltage applications Main project: FIRST -> Development of high voltage and high efficiency converter for HVDC grid applications My work: - 4H-SiC extended defects characterization by PhotoLuminescence imaging and spectroscopy - Set up of an innovative technique for localization and identification of 4H-SiC stacking faults call "PL Imaging Spectroscopy" - 4H-SiC carrier lifetime characterization by µPCD - Improvement of ohmic contact on p-type 4H-SiC Show less



INSA Lyon - Institut National des Sciences Appliquées de Lyon

• France
• Higher Education
• 700 & Above Employee

• Process development engineer & power devices designer - Post-doctoral position

  • Feb 2011 - Jun 2013

  Study and applications of p-type selective epitaxial growth by Vapor-Liquid-Solid Transport (VHVD project - French National Agency for Research) Context: an innovative selective epitaxial growth technique (SEG-VLS) of highly p-type doped 4H-SiC layer have been developed by LMI lab. The goals of the project are to improve the layer quality and study applications of this growth technique. My work: - Development of a 1200 V 4H-SiC PiN diode with emitter and guard rings edge termination made by SEG-VLS. Simulation, design, fabrication and characterization of the PiN diode - Electrical and physical characterizations of SEG-VLS layer - Study of post growth process Development of 10 kV PiN diode and thyristor (TRACE project) for Military and railway applications My work: simulation, design and characterization of 10 kV PiN diode, Thyristor and GTO Thyristor Show less



Université Claude Bernard Lyon 1

• France
• Higher Education
• 700 & Above Employee

• PhD student

  • Feb 2008 - Jan 2011

  Title: Characterization and physical modeling of contacts between metallic phases and Gallium Nitride My employer was STMicroelectronics and my research was in collaboration with LMI. See the description in the previous experience. Title: Characterization and physical modeling of contacts between metallic phases and Gallium Nitride My employer was STMicroelectronics and my research was in collaboration with LMI. See the description in the previous experience.



STMicroelectronics

• Switzerland
• Semiconductor Manufacturing
• 700 & Above Employee

• Material science & process development engineer

  • Nov 2007 - Jan 2011

  G2REC project: Optimization and Industrialization of a 600 V GaN/Si Schottky rectifier My work: Characterization and physical modeling of contacts between metallic phases and Gallium Nitride - Fabrication and electrical characterization of specific test devices for ohmic and Schottky contact process improvement - Characterization of metallic and pseudo-metallic phases formed during the annealing stage (XRD, XPS, SIMS, SEM...) - Characterization of the kinetic formation of phases during annealing process (Differential Scanning Calorimetry) - Characterization of the Metal / Semiconductor interface (TEM) - Physical and chemical modeling of the contact formation Show less



STMicroelectronics

• Switzerland
• Semiconductor Manufacturing
• 700 & Above Employee

• Internship

  • Mar 2007 - Aug 2007

  Electrical characterization of thick SiO2 layers grown on Si by wet thermal oxidation Electrical characterization of thick SiO2 layers grown on Si by wet thermal oxidation



LMP - Université de Tours

• Région de Tours, France

• Student Project

  • Sep 2006 - Mar 2007

  Design of 4H-SiC V-JFET by finite elements simulation for current limiting application. Project for STMicroelectronics and Schneider Electric Design of 4H-SiC V-JFET by finite elements simulation for current limiting application. Project for STMicroelectronics and Schneider Electric



FORTH - IESL

• Heraklion, Crete, Greece

• Research internship

  • Jun 2006 - Aug 2006

  Via hole processing on 4H-SiC by laser ablation Via hole processing on 4H-SiC by laser ablation