Nestor Campos

Teacher at Fundación Fulgor
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Contact Information
us****@****om
(386) 825-5501
Location
Argentina, AR
Languages
  • Español Native or bilingual proficiency
  • English Full professional proficiency

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Experience

    • Argentina
    • Higher Education
    • 1 - 100 Employee
    • Teacher
      • May 2018 - Present

      The Fulgor Foundation is an organization that gives scholarships to pre and post-graduate students in Argentina. I teach the course “System design of communication systems” in a yearly basis. The course comprises concepts of digital communications, adaptive equalization, synchronization and optical systems. I also give support to undergraduate students and to PhD candidates that work in other areas (like analog design) and need to include DSP algorithms in their simulators. In 2019 I was the thesis co-director of two undergraduate students that obtained their Engineer Degree with the work “Optical coherent receiver for high-order modulations”

    • Argentina
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Assistant Director
      • Jul 2020 - Present

      - System DSP architect of the new generation 800Gbps product- Feasibility analysis considering analogue subsystems, packaging options and optical components for the next generation platforms and modules- Leading other engineers to implement the simulator for the new 800Gpbs DSP- Simulation workflow manager- Testplan design and supervision. Schedule definition- Internal and external customer support

    • Principal Engineer
      • Jun 2018 - Jul 2020

      - Research and development of DSP algorithms for the new generation transceiver(Canopus) using probabilistic shaping and rates up to 400Gbps in 7nm- Algorithm design regarding adaptive equalization, clock synchronization and carrier synchronization (DD-PLL, BPS, ML) - Analogue specs definitions- Optical components modelling- High level system feasibility analysis for different applications, optical platforms and integrated pluggable modules- Designs to support OIF ZR standards in Canopus DSP- Testplan design, schedule definition and supervision of the verification stage- Simulator workflow manager- RTL implementation reviewer- Post-silicon laboratory validation in Santa Clara, CA for 2 weeks- Customer support regarding system issues- Capacitation and training of new employees- Firmware development

    • Senior Engineer
      • Nov 2015 - Jun 2018

      - Verification of simple DSP blocks and resolution of simple problems in the company’ssimulators (C++)- Workflow improvements writing tools in Python- Processing of measured optical signals using DSP simulators - Integration tests for the fixed-point models and system level verification for the Clariphy M200 transceiver (QAM16 200Gbps)- Resolution of RTL issues and bugs- Research and development of algorithms for QAM64, mainly focused on non-linearcompensation using Volterra filters and carrier synchronization- Design and implementation of simulators for 600Gbps optical transceivers in C++, Matlab and Python- Develop of fixed-point golden reference for the RTL team - Analogue specification definitions regarding the required sampling rate andbandwidth of the DAC/ADC- Architectural definition of the DSP for the next generation 800Gpbs transceivers

    • Teaching Assistant
      • Mar 2012 - Aug 2015

      Teaching Assistant on Signals and Systems Analisys, that belong to Electronic´s Engineering carreer

    • Teaching Assistant
      • Mar 2010 - Feb 2012

      Physics I teach assitant

    • Docente
      • Mar 2010 - Aug 2015

      Proffesor. Diverse subjects related to electronics, semiconductors and electrical machines Proffesor. Diverse subjects related to electronics, semiconductors and electrical machines

    • Argentina
    • Research
    • 100 - 200 Employee
    • Becario Diseño Digital
      • Mar 2014 - Jul 2015

      Design and development of a new interface that allows the interconnection between thecomputers at the Command and Control Systems on board a naval ship and a personalcomputer. Using a FPGA, I developed the physical layer of the proprietary communicationprotocol. Then, I developed some applications over an ARM microcontroller using C, aswell a dedicated PC software using QT and C++ Design and development of a new interface that allows the interconnection between thecomputers at the Command and Control Systems on board a naval ship and a personalcomputer. Using a FPGA, I developed the physical layer of the proprietary communicationprotocol. Then, I developed some applications over an ARM microcontroller using C, aswell a dedicated PC software using QT and C++

Education

  • Universidad Tecnológica Nacional
    Engineer's degree, Electronics
    2009 - 2015
  • Insituto Centenarios
    Technician, Electronics
    2003 - 2008

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