Neelima Regatte

Staff Engineer at Qualcomm Atheros
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Contact Information
us****@****om
(386) 825-5501
Location
San Jose, California, United States, US
Skills

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Experience

  • Atheros Communications
    • United States
    • Semiconductors
    • 100 - 200 Employee
    • Staff Engineer
      • Jun 2011 - Present

  • AppliedMicro
    • United States
    • Semiconductor Manufacturing
    • 100 - 200 Employee
    • Design Verification Engineer II
      • Jul 2006 - Jan 2010

  • Intel Corporation
    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • ASIC Verification Engineer
      • May 2005 - Jun 2006

      Veirification of PCIE gen1/gen2 Physical Layer. Deisgn debug of PCIE gen1/gen2 Data Link Layer. Veirification of PCIE gen1/gen2 Physical Layer. Deisgn debug of PCIE gen1/gen2 Data Link Layer.

Education

  • San Jose State University
    MS, Computer Engineering
    2002 - 2004
  • SRTIST, Hyderabad, India
    B.Tech, Computer Science & Engineering
    1996 - 2000

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