Nagendra Babu Achenta
Sr. Staff System Engineer at MaxLinear- Claim this Profile
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English Full professional proficiency
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Hindi Full professional proficiency
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Telugu Native or bilingual proficiency
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Bio
Bharadwaj Chalamchala
Nagendra is one of the Hard Working RF Engineer I've had the chance to meet with. Besides spending a lot of his time on Testing Stuff in Lab, he handles fast paced PCB Job's effectively. His exposure to Testing, RF Capabilities and Problem solving Skills are always an asset to him and the Organization he works in. All the Best.
Bharadwaj Chalamchala
Nagendra is one of the Hard Working RF Engineer I've had the chance to meet with. Besides spending a lot of his time on Testing Stuff in Lab, he handles fast paced PCB Job's effectively. His exposure to Testing, RF Capabilities and Problem solving Skills are always an asset to him and the Organization he works in. All the Best.
Bharadwaj Chalamchala
Nagendra is one of the Hard Working RF Engineer I've had the chance to meet with. Besides spending a lot of his time on Testing Stuff in Lab, he handles fast paced PCB Job's effectively. His exposure to Testing, RF Capabilities and Problem solving Skills are always an asset to him and the Organization he works in. All the Best.
Bharadwaj Chalamchala
Nagendra is one of the Hard Working RF Engineer I've had the chance to meet with. Besides spending a lot of his time on Testing Stuff in Lab, he handles fast paced PCB Job's effectively. His exposure to Testing, RF Capabilities and Problem solving Skills are always an asset to him and the Organization he works in. All the Best.
Credentials
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Introduction to Programming with MATLAB
Coursera Course CertificatesDec, 2016- Nov, 2024 -
Introduction to Programming with MATLAB
Coursera Course CertificatesDec, 2016- Nov, 2024
Experience
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MaxLinear
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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Sr. Staff System Engineer
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Dec 2017 - Present
Sims:5G chip simulations of PI and SI Analysis for package & board.Package plane optimization in reducing IR drop while not compromising RF parametersVia optimization using HFSS 3D for Return Loss and RF conn. sim using HFSS MCAD.Increasing common mode isol through balanced GND routing.Validation of RF RX/TX paths:
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Staff Systems Engineer
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Feb 2014 - Dec 2017
Design PCB EVAL boards for the chips in DVB-S technology and evaluate them for the I2C, SPI, UART interfaces and testing GPIO blocks. Design front-end filters of 250-2300MHz through ADS.Evaluated SNR, INL, DNL, Gain & Offset parameters for GPADC, Done Full Scale Analysis using Logic Analyzer. Cross-functionality testDesigned board for cable modem (RPD), selecting the regulators, simulation of IR drop across planes. Selection of external circuitry for PDN analysis in reducing parallel resonant freq. Show less
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Analinear Imaging Systems
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India
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Semiconductor Manufacturing
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1 - 100 Employee
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Design Engineer
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Dec 2013 - Jan 2014
Simulating DDR-FPGA interface signals for signal integrity and guiding PCB design engineers. Analyzing for impedance mismatch and optimizing the circuit for power supply portion. Simulating DDR-FPGA interface signals for signal integrity and guiding PCB design engineers. Analyzing for impedance mismatch and optimizing the circuit for power supply portion.
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Qualcomm
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United States
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Telecommunications
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700 & Above Employee
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Engineer, Senior
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Dec 2012 - Jul 2013
Designing circuit for qualcomm chips to meet 3GPP standards by a considerable margin. Improving sensitivity and ACLR by impedance matching for transceiver chip is part of the project. Testing all parameters of 3GPP standards of different technologies include GSM, WCDMA, LTE, TDSCMDA. Designing circuit for qualcomm chips to meet 3GPP standards by a considerable margin. Improving sensitivity and ACLR by impedance matching for transceiver chip is part of the project. Testing all parameters of 3GPP standards of different technologies include GSM, WCDMA, LTE, TDSCMDA.
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Powerwave Technologies
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United States
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Telecommunications
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200 - 300 Employee
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Design Engineer - II
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Jun 2010 - Dec 2012
• Designed matching circuit in ADS for the 10W Avg. amplifier for the 1800 band. • Designed Power Amplifier with Doherty Lite Configuration for 3W Avg. PA for AWS band • Tested various Directional Coupler and Hybrid Couplers • Small Signal Amplifier Matching has been done. • Simulated various PA’s for making the common layout for the PA • Simulated various Effects of PCB fabrication for the Directional Coupler • Simulated yield analysis for the TMA LNA by using models for inductors and capacitors. Show less
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Engineer
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Nov 2006 - Jun 2010
Designed Module wise PA's and heat sink calculation Designed Module level Amplifiers. Designed Pin Diode Switched, Microstrip Filters, Power Dividers, Measured System Level parameters like, Sensitivity, BER etc. EMI/EMC testing and analysis Designed Control Circuit for PA for TDD switching. Noise Figure Measurement has been done for LNA. Designed Module wise PA's and heat sink calculation Designed Module level Amplifiers. Designed Pin Diode Switched, Microstrip Filters, Power Dividers, Measured System Level parameters like, Sensitivity, BER etc. EMI/EMC testing and analysis Designed Control Circuit for PA for TDD switching. Noise Figure Measurement has been done for LNA.
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Education
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2003 - 2006
V.R.Siddhartha Engineering College
Bachelor of Engineering (B.E.), Electronics and Communications Engineering -
1999 - 2002
S.E.S.C Govt. Poly. Technic College
D.E.C.E, Diploma in Electronics and Communication Engineering -
1987 - 1999
Kennedy high School
State Boards 10th Exam Certificate, Grade 1st-10th
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