Mohan Kumar Gangadharappa

Chief Technology Officer at IFCS Technologies Private Limited
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Contact Information
us****@****om
(386) 825-5501
Location
Bengaluru, Karnataka, India, IN
Languages
  • Kannada -
  • English -
  • Hindi -
  • Telugu Elementary proficiency

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Experience

    • India
    • Semiconductors
    • 1 - 100 Employee
    • Chief Technology Officer
      • Apr 2021 - Present

    • United Kingdom
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Verification Engineer
      • Jan 2021 - Mar 2021

      Worked on verification using SV/UVM Worked on verification using SV/UVM

    • India
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Director - Verification
      • Oct 2019 - Sep 2020

      Worked on Module as well as SoC/Chip Level Verification. Worked on Module as well as SoC/Chip Level Verification.

    • India
    • Semiconductor Manufacturing
    • 1 - 100 Employee
    • Senior Technical Manager - Design & Verification
      • Jun 2018 - Sep 2019

      Worked on IP Level Verification Worked on SoC Level DFx Activities Worked on IP Level Verification Worked on SoC Level DFx Activities

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Senior Design Engineer
      • Oct 2016 - Apr 2018

      Worked on IP DFx (TAP Based Debug, MBIST Connectivity, Internal Signal Debug Architecture, SpyGlassDFT, Scan ATPG) Worked on IP DFx (TAP Based Debug, MBIST Connectivity, Internal Signal Debug Architecture, SpyGlassDFT, Scan ATPG)

    • General Manager – Engineering
      • Sep 2016 - Oct 2016

      Team Development and Designing of PCIe3.0 IP Team Development and Designing of PCIe3.0 IP

  • VisvaTech Solutions
    • Bengaluru Area, India
    • Principal Consultant
      • Feb 2016 - Jun 2016

      Design and Verification of FPGA modules for Motion Vectoring Receiver (MVRx) and Foreign Object Detection (FoD) at Client site in Pune (HTL, Pune). Design and Verification of FPGA modules for Motion Vectoring Receiver (MVRx) and Foreign Object Detection (FoD) at Client site in Pune (HTL, Pune).

    • India
    • IT Services and IT Consulting
    • 700 & Above Employee
    • Associate Consultant
      • Apr 2011 - Feb 2016

      ASIC Design/Verification Manager ASIC Design/Verification Manager

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Contingency Worker (Through TCS)
      • Dec 2012 - Aug 2014

      Project Manager - VPG ASIC Project Setup

    • Contingency Worker (Through TCS)
      • May 2011 - Dec 2012

      Onsite Project Manager + Worked on Design/Development/Verification/SoC Integration of DFx Soft IPs using SystemVeriog, OVM + Integration & Verification of Test Chip (CherryLake)

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Principal Engineer - Verification
      • Dec 2010 - Mar 2011

      Worked on Analog Modules Behavioral model analysis. Development or updating of Behaviroal models. Implementation of Digital Connectivity Check and Analog ID Check for the behavioral models using Verilog & SystemVerilog Worked on Analog Modules Behavioral model analysis. Development or updating of Behaviroal models. Implementation of Digital Connectivity Check and Analog ID Check for the behavioral models using Verilog & SystemVerilog

    • United States
    • Aviation & Aerospace
    • 700 & Above Employee
    • Contractor (Through TCS)
      • Sep 2010 - Nov 2010

      Worked on verification of GCP (Generator Control and Protection) FPGA, which is a part of EPS (Electrical Power Systems) PCU (Power Control Unit) using VHDL, Modelsim6.4a & DOORS. The work involves the development of verification models for different functional blocks like ADC, Inter FPGA Transmitter, Inter FPGA Receiver, Discrete Input Drive, Discrete Output Observer, Documentation, Development of different Test Scenarios/Cases & Generating the Coverage Reports. The verification is carried out in accordance with DO254 standard. Show less

    • India
    • IT Services and IT Consulting
    • 700 & Above Employee
    • Associate Consultant
      • Jan 2010 - Nov 2010

      Got Promoted on 1st Jan 2010.Work in the area of ASIC/FPGA Design/Verification using SystemVerilog, AVM & OVM

    • Assistant Consultant
      • Jan 2006 - Dec 2009

      Got Promoted on January 2006.Worked in the area of ASIC/FPGA Design/Verification using SystemC, Verilog, Customer Specific Verification Methodology & Transaction Explorer.

    • SPOC for Esterel Studio Design Services and Support Activities
      • May 2008 - Dec 2008

      Performed the following activities:1) Handling the product support2) Design services3) Consulting4) Marketing and SalesLanguages used were: Esterel, Verilog, VHDL, SystemC, CircuitC

    • Member of Business Response Team
      • May 2007 - May 2008

      Performed Pre-Sales acivity for Embedded/VLSI Group of TCS

    • IT Analyst
      • Dec 2002 - Dec 2005

      Worked in the area of ASIC/FPGA Design/Verification of WLAN (802.11a) Transceiver, POSIC, Bus Interface Controller Module for TI-OMAP Processor on its EMIFs Interface using Verilog, SystemC

    • United States
    • Semiconductor Manufacturing
    • 700 & Above Employee
    • Contingency Worker (Through TCS)
      • Jun 2009 - Jun 2010

      Onsite Manager + Worked on Design/Development/Verification/SoC Integration of DFx Soft IPs using SystemVerilog, AVM & OVM Onsite Manager + Worked on Design/Development/Verification/SoC Integration of DFx Soft IPs using SystemVerilog, AVM & OVM

    • United States
    • IT Services and IT Consulting
    • 700 & Above Employee
    • Contractor (Through TCS)
      • Jul 2005 - Apr 2007

      Onsite Manager + Worked on the Verification of IOH (RC) in Windjammer Project using SystemC, Verilog, Customer Specific Verification Methodology & Transaction Explorer. Onsite Manager + Worked on the Verification of IOH (RC) in Windjammer Project using SystemC, Verilog, Customer Specific Verification Methodology & Transaction Explorer.

    • Software Development
    • 1 - 100 Employee
    • Senior IC Design Engineer
      • Oct 2000 - Sep 2002

      Worked in the area of ASIC/FPGA Design/Verification of SDRAM Controller using Veriog (between July 2002 to Sept 2002) Worked in the area of ASIC/FPGA Design/Verification of SDRAM Controller using Veriog (between July 2002 to Sept 2002)

    • United States
    • IT Services and IT Consulting
    • 700 & Above Employee
    • Contractor (Through DCM Technologies)
      • Oct 2000 - Jun 2002

      Worked on Verifacation of PCI/PCI-X Core with Hot-Plug Support using Verilog Worked on Verifacation of PCI/PCI-X Core with Hot-Plug Support using Verilog

    • India
    • IT Services and IT Consulting
    • 700 & Above Employee
    • Senior Engineer - VLSI/System Design
      • Jan 2000 - Oct 2000

      Worked in the area of ASIC/FPGA Design/Verification of MCU (ARM7TDMI) based ABS using VHDL Worked in the area of ASIC/FPGA Design/Verification of MCU (ARM7TDMI) based ABS using VHDL

    • India
    • IT Services and IT Consulting
    • 700 & Above Employee
    • Member Technical Staff
      • Jun 1999 - Jan 2000

      Worked in the area of ASIC/FPGA Design/Verification of DRAM and SDRAM Controllers using VHDL Worked in the area of ASIC/FPGA Design/Verification of DRAM and SDRAM Controllers using VHDL

    • India
    • Research
    • 700 & Above Employee
    • Project Assistant
      • Sep 1997 - Jun 1999

      Worked in the area of ASIC/FPGA Design/Verification of a DSP processor using VHDL. Developed Instruction Set Simulator (ISS) using C/C++. Developed Assembler using Flex & Byson. Worked in the area of ASIC/FPGA Design/Verification of a DSP processor using VHDL. Developed Instruction Set Simulator (ISS) using C/C++. Developed Assembler using Flex & Byson.

  • Golden Data Systems
    • Bengaluru, India
    • Software Programmer
      • Nov 1996 - Aug 1997

      Worked in the area of Software Development Using C/C++ Worked in the area of Software Development Using C/C++

Education

  • Kuvempu Vishwavidyanilaya
    Bachelor of Engineering, Electronics and Communication
    1991 - 1995
  • Sri Jagadguru MurughaRajendra Institute of Technology (SJMIT), Chitradurga, Karnataka
    Bachelor of Engineering, Electronics and Communication
    1991 - 1995

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