Michael Hilgers

Hardware Engineer - FPGA Engineering at EURESYS
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Contact Information
us****@****om
(386) 825-5501
Location
Brussels, Brussels Region, Belgium, BE
Languages
  • Deutsch Native or bilingual proficiency
  • Französisch Full professional proficiency
  • Englisch Professional working proficiency

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Credentials

  • Essential DSP Implementation Techniques for Xilinx FPGAs
    Core|Vision B.V.
    Feb, 2022
    - Nov, 2024
  • Doulos - Expert VHDL
    Doulos
    Dec, 2021
    - Nov, 2024

Experience

  • EURESYS
    • Belgium
    • Appliances, Electrical, and Electronics Manufacturing
    • 1 - 100 Employee
    • Hardware Engineer - FPGA Engineering
      • Apr 2021 - Present

    • Junior Hardware Engineer - FPGA Engineering
      • Apr 2021 - Oct 2021

  • mh audiotechnics - Michael Hilgers
    • Sankt Vith, Belgien
    • Freelance Sound Engineer
      • Jan 2019 - Present

      Activities: - Production for radio and television - Sound reinforcement - Sound recording (Part time occupation) Activities: - Production for radio and television - Sound reinforcement - Sound recording (Part time occupation)

  • BCE - Broadcasting Center Europe
    • Luxembourg
    • Broadcast Media Production and Distribution
    • 100 - 200 Employee
    • Freelancer (Sound Department)
      • Jan 2019 - Present

      Live production for radio, television and streaming Live production for radio, television and streaming

  • d&b audiotechnik
    • Germany
    • Appliances, Electrical, and Electronics Manufacturing
    • 200 - 300 Employee
    • R&D Electronics Engineer
      • Sep 2019 - Apr 2021

      Responsibilities:- Design, optimization and testing of hardware (digital and mixed-signal)- Specification, support and approval of external development projects- Technology research and integration

    • Intern - R&D Electronics
      • Feb 2019 - Aug 2019

      Bachelor's thesis (Applied Electronics at HEFF in Brussels):« Quality assurance of the media clock recovery in MILAN networks - Development of a device for automated and application-oriented testing »Keywords:Media Clock Recovery, MILAN, FPGA measurement, AES3 phase-shift, audio networks

Education

  • Institut National Supérieur des Arts du Spectacle et des techniques de diffusion (INSAS)
    Bachelor's degree, Sound Engineering
    2013 - 2016
  • Haute Ecole 'Francisco Ferrer' de la Ville de Bruxelles
    Bachelor's degree, Applied Electronics
    2016 - 2019

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