Mathieu MANIN

FPGA Designer at NEXVISION SAS
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Contact Information
us****@****om
(386) 825-5501
Location
Greater Marseille Metropolitan Area, FR
Languages
  • Francais Native or bilingual proficiency
  • English Professional working proficiency

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Experience

    • France
    • Appliances, Electrical, and Electronics Manufacturing
    • 1 - 100 Employee
    • FPGA Designer
      • Jul 2012 - Present

      - Coordinateur technique d'un "Système de vision de nuit pour casque de pilote d'hélicoptère | HMSD | Réalité augmentée" (Elaboration de l'architecture produit, Relation avec les partenaires,...) - Architecte FPGA sur une dizaine de projets - Manager d'une dizaine de personnes suivant les projets - FPGA Designer en traitement d'images et drivers de capteurs d'images (CMOSIS, Aptina, Photonis, Sony, OmniVision, Pyxalis,...) essentiellement sur cible FPGA Xilinx série 6, 7 et ultrascale. - Asservissement de motor Bruchless sur cible FPGA (Clarke, Park, SVPWM,...) Outils utilisés: - Xilinx Vivado, Xilinx ISE, Xilinx Isim, Questa, ... - GIT, SVN , RedMine, ... Show less

    • Switzerland
    • Retail
    • 1 - 100 Employee
    • Trainee
      • Sep 2011 - Feb 2012

      Responsible of main test bench - Conception of test sequences, HMI and simulation models with National Instrument and Clemessy tools. - Hardware evolution: CAN Bus, I/O modules Responsible of main test bench - Conception of test sequences, HMI and simulation models with National Instrument and Clemessy tools. - Hardware evolution: CAN Bus, I/O modules

    • IT analyst
      • Apr 2008 - Aug 2011

      IT analyst - Conception and optimization of data bases - Access (Visual Basic) and FileMaket (2months in 2008, 1month in 2009 and 2 months in 2010) - Responsible of technical change for the aluminum products (6months in 2011) IT analyst - Conception and optimization of data bases - Access (Visual Basic) and FileMaket (2months in 2008, 1month in 2009 and 2 months in 2010) - Responsible of technical change for the aluminum products (6months in 2011)

    • Trainee
      • Sep 2009 - Feb 2010

      Implantation of CPU soft-core on FPGA for control of experimental measures with Linux platform (CentOS) - Choice of CPU soft-core - Choice of FPGA - Conception of electronic development platform - Utilization of VHDL and C languages for the FPGA et Linux Implantation of CPU soft-core on FPGA for control of experimental measures with Linux platform (CentOS) - Choice of CPU soft-core - Choice of FPGA - Conception of electronic development platform - Utilization of VHDL and C languages for the FPGA et Linux

Education

  • Université de Technologie de Belfort-Montbéliard
    French engineer, Electrical and Control System Engineering
    2008 - 2012
  • Institut Universitaire de Technologie (IUT B Lyon)
    DUT (equivalent of english HND), Electrical and Electronics Engineering
    2005 - 2008

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