Experience

NovAtel

• Canada
• Appliances, Electrical, and Electronics Manufacturing
• 200 - 300 Employee

• Sr. Digital HW Engineer

  • May 2006 - Present

  System level requirements and architecture definition.FPGA and ASIC design.High speed digital and mixed signal board level (multi-layer PCB) designsLead designer in the development of two low-power ASICs with embedded ARM CPU core.Lead design engineer of hardware platforms for high-precision, low-cost, single-frequency GNSS receiver engines.Lead design engineer for the implemention and integration of tightly coupled high-precision GNSS receivers with MEMS based Inertial Measurement Units (IMUs).



Acceleware Ltd.

• Canada
• Oil and Gas
• 1 - 100 Employee

• Hardware Engineer

  • Oct 2005 - Apr 2006

  Developed FPGA-based accelerator for cryptography algorithm. Developed FPGA-based accelerator for cryptography algorithm.



CSI Wireless

• Wireless Services

• Hardware Engineer

  • Jul 2001 - Aug 2003

  GPS Receiver digital design, PCB design. Developed specifications and test plans. GPS Receiver digital design, PCB design. Developed specifications and test plans.



Wind River

• United States
• Software Development
• 700 & Above Employee

• Hardware Developer

  • May 2000 - May 2001

  Hardware development of reference designs for consumer internet appliances. Hardware development of reference designs for consumer internet appliances.



AudeSi Technologies Inc.

• Hardware Engineer

  • May 1998 - Apr 2000

  Junior engineer developing digital embedded hardware designs for SmartCard and internet appliances. Firmware development of device drivers for VxWorks RTOS. Junior engineer developing digital embedded hardware designs for SmartCard and internet appliances. Firmware development of device drivers for VxWorks RTOS.