Michele Magistretti
Engineering and RD Manager at ODL Srl- Claim this Profile
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English Professional working proficiency
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German Limited working proficiency
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Spanish Elementary proficiency
Topline Score
Bio
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Credentials
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Finance for Non-Financial Managers
LinkedInApr, 2020- Sep, 2024 -
Lean Six Sigma Foundations
LinkedInApr, 2020- Sep, 2024 -
Project Management Foundations: Budgets
LinkedInApr, 2020- Sep, 2024 -
Project Management Foundations: Small Projects
LinkedInApr, 2020- Sep, 2024 -
Scrum: The Basics
LinkedInApr, 2020- Sep, 2024 -
Six Sigma: Green Belt
LinkedInApr, 2020- Sep, 2024 -
Metrologia di base
IMQ S.p.A.Mar, 2020- Sep, 2024
Experience
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ODL Srl
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Italy
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Nanotechnology Research
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1 - 100 Employee
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Engineering and RD Manager
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Jun 2020 - Present
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Cariboni Group
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Italy
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Appliances, Electrical, and Electronics Manufacturing
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1 - 100 Employee
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RD MANAGER - Research and Development and Technology development manager
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Mar 2015 - Jun 2020
Reporting to the CEO.Coordinating program for R&D and new technology development:-Technology architecture definition, prototyping, -LED, drivers, IoT, comunication devices and material characterization-Projects management: action plan definition, monitoring, risk management (FMEA)-Support to Manufacturing during production -Support to design-Technology selection and product optimization.-Patents evaluation and definition.Coordination of process development, including cooperation with external research institutes and/or universities.Coordination and management of Quality Lab.
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STMicroelectronics
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Switzerland
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Semiconductor Manufacturing
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700 & Above Employee
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Production planning and control, Manufacturing Production Control
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May 2013 - Feb 2015
Coordinating program for the speed up of lots (WIP) of R&D and Prod in collaboration with product/ process development group.- Monitor of production plan and measure of the cycle time. KPI definition.- Definition of corrective actions, recovery plans. - Analysis of the main causes of stop and wait of WIP - Continuos improvement program: Remove inefficiencies in management of the production line.- Ensure proper management of materials by tracing the WIP along the production lines.- Problem solving. Development of new strategies for lots advancement. Coordinate the flow of information between different organization to have best Cycle Time -People management: 12 technicians monitoring lots in line-Tool development
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Micron Technology
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United States
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Semiconductor Manufacturing
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700 & Above Employee
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Production planning and control, Manufacturing Production Control
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Oct 2010 - May 2013
Coordinating program for the speed up of lots (WIP) of R&D and Prod in collaboration with product/ process development group.- Monitor of production plan and measure of the cycle time. KPI definition.- Definition of corrective actions, recovery plans. - Analysis of the main causes of stop and wait of WIP - Continuos improvement program: Remove inefficiencies in management of the production line.- Ensure proper management of materials by tracing the WIP along the production lines.- Problem solving. Development of new strategies for lots advancement. Coordinate the flow of information between different organization to have best Cycle Time -People management: 12 technicians monitoring lots in line-Tool development
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Group Leader, Senior Research And Development Engineer, Process integration
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May 2010 - Nov 2010
My job consisted in managing the group responsible for the integration of the process flow and coordinate the activity of people working on different technological areas, and the activity developed by process module.Under guidance of Project leader, I managed the activity, in the environment of Line, taking care of cycle time, quality, morphological charact and reporting the activity.I worked on the development of Phase Change non-volatile Memories 32nm.
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Numonyx
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Switzerland
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Semiconductor Manufacturing
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300 - 400 Employee
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Group Leader, Senior Research And Development Engineer, Process integration
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Oct 2008 - May 2010
My job consisted in managing the group responsible for the integration of the process flow and coordinate the activity of people working on different technological areas, and coordinate the activity developed by process module.Under guidance of Project leader, I managed the activity on silicon, in the environment of Line, taking care of cycle time, silicon quality, silicon morphological charact and reporting the activity.I worked on the yield enhancement of Phase Change non-volatile Memories 90nm (Alverstone) and on the pathfinding of the 32nm.
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Senior Research And Development Engineer, Process integration
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Mar 2008 - Sep 2008
-Carry on process integration of Phase Change non-volatile Memories 90nm (Alverstone), with aim to achieve optimized process flow in terms of performance and manufacturability.-Under guidance of Project leader, manage the activity on silicon, in the environment of Line, taking care of cycle time, silicon quality, silicon morphological charact. and reporting activity.Silicon management-Process flow definition, taking care of correct process steps sequence, of material/equipment constraints-Management of the needed morphological and electrical silicon lots during the processing in line, taking care of proper implementation of architecture-Implementation on the silicon of trials and tests needed: 1)fix the better process options, in terms of electrical performance, reliability and cost effectiveness; 2)ensure the process latitude necessary for industrial production;- Silicon morphological charact.-Problem solving-Process Validation -Coordination, Relational tasksJDP on Phase change memories with Intel
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Senior Research And Development Engineer, Process integration
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Nov 2002 - Mar 2008
-Carry on process integration of Phase Change non-volatile memories 90nm (Alverstone), with aim to achieve optimized process flow in terms of performance and manufacturability.-Under guidance of Project leader, manage the activity on silicon, in the environment of Line, taking care of cycle time, silicon quality, silicon morphological charact. and reporting activity.Silicon management-Process flow definition, taking care of correct process steps sequence, of material/equipment constraints-Management of the needed morphological and electrical silicon lots during the processing in line, taking care of proper implementation of architecture-Implementation on the silicon of trials and tests needed: 1)fix the better process options, in terms of electrical performance, reliability and cost effectiveness; 2)ensure the process latitude necessary for industrial production;- Silicon morphological charact.-Problem solving-Process Validation -Coordination, Relational tasksJDP on Phase change memories with Intel
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Education
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Università degli Studi di Milano-Bicocca
Material Science -
Technical University of Munich
Physics -
Liceo Scientifico
BS