Luis Eduardo Chaparro Roa

Digital transformation development engineer at Aseinges Outsourcing S.A.S
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Contact Information
us****@****om
(386) 825-5501
Location
Santander, Colombia, CO
Languages
  • Español Native or bilingual proficiency
  • English Elementary proficiency
  • Portugués Elementary proficiency

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Juan Jose Carrillo

Luis is an electronics engineering student with significant research experience in integrated circuit design. He is a responsible and disciplined person that works well in team. I supported the development of his undergraduate project, where he showed me desire to learn, intelligence for solving problems and pleasure to design ICs. Surely I would recommend him for developing IC design research projects.

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Credentials

  • Curso de Buenas Prácticas y Código Limpio en C#
    Platzi
    Apr, 2023
    - Oct, 2024
  • Curso de C# con .Net Core
    Platzi
    Feb, 2023
    - Oct, 2024
  • Curso de Fundamentos de Entity Framework
    Platzi
    Feb, 2023
    - Oct, 2024
  • Curso Profesional de Git y GitHub
    Platzi
    Jan, 2023
    - Oct, 2024
  • Fundamentos de C# con NET Core
    Platzi
    Jan, 2023
    - Oct, 2024
  • Curso de Fundamentos de .NET
    Platzi
    Dec, 2022
    - Oct, 2024
  • Curso de Programación Orientada a Objetos: POO
    Platzi
    Dec, 2022
    - Oct, 2024
  • Scrum Foundation Professional Certificate - SFPC™
    CertiProf
    Dec, 2022
    - Oct, 2024
  • Curso de Introducción al Desarrollo Backend
    Platzi
    Nov, 2022
    - Oct, 2024

Experience

    • Colombia
    • IT Services and IT Consulting
    • 1 - 100 Employee
    • Digital transformation development engineer
      • Jan 2023 - Present
    • Software Development
    • 200 - 300 Employee
    • Innovation engineer
      • Jun 2017 - Oct 2022

    • Development engineer
      • Apr 2017 - Jun 2017

    • Colombia
    • Education Administration Programs
    • 700 & Above Employee
    • Student Research
      • Jun 2015 - Dec 2016

      He was involved in the verification of the ADC, which is one of the peripherals of the 32-bit RISC-V microcontroller developed in ONCHIP. He also participated in the integration and sign-off of MIRLA chip. Besides, he participated in the Sampa chip of the ALICE experiment of CERN with the design of a PAD I2C driver. He was involved in the verification of the ADC, which is one of the peripherals of the 32-bit RISC-V microcontroller developed in ONCHIP. He also participated in the integration and sign-off of MIRLA chip. Besides, he participated in the Sampa chip of the ALICE experiment of CERN with the design of a PAD I2C driver.

Education

  • Universidad Industrial de Santander
    Grado en Ingeniería, Electronic Engineering
    2010 - 2016

Community

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