Experience

senseFly, now AgEagle

• Switzerland
• Aviation and Aerospace Component Manufacturing
• 1 - 100 Employee

• Navigation, guidance and control Engineer

  • Apr 2021 - Present

  - In a small team, design and implement the navigation, guidance and control for a fixed-wing drone autopilot.- Prototype (in Python), deploy (in C++) and maintain the Kalman filter based sensor fusion algorithm for inertial navigation.

• Software Engineer

  • Jan 2020 - Mar 2021

  - In a SCRUM team, implement, test and continuously improve the desktop and embedded software to fly and monitor a fixed-wing drone.- Participate in software design, code reviews and test flights.



Advanced Silicon

• Switzerland
• Semiconductor Manufacturing
• 1 - 100 Employee

• Digital image processing engineer

  • Jun 2016 - Oct 2019

  - Design, implement and test 3D scene reconstruction and hand gesture recognition software for human-machine interaction. - In a small R&D team, contribute to hardware and software architecture, specification and planning from prototype to product. - Set up and maintain a live demo of this software, with a focus on low latency and robustness. - Design, implement and test 3D scene reconstruction and hand gesture recognition software for human-machine interaction. - In a small R&D team, contribute to hardware and software architecture, specification and planning from prototype to product. - Set up and maintain a live demo of this software, with a focus on low latency and robustness.



Ghent University

• Belgium
• Higher Education
• 700 & Above Employee

• VHDL programmer - Visiting Student

  • Apr 2010 - Sep 2010

  Design a pipelined heap queue sorting algorithm for event management in a large scale spiking neural network simulation on FPGA. Design a pipelined heap queue sorting algorithm for event management in a large scale spiking neural network simulation on FPGA.



Université de Sherbrooke

• Canada
• Higher Education
• 700 & Above Employee

• VHDL programmer - Intern

  • Jun 2007 - Aug 2007

  Implement a 400 MB/s PCIe link to transfer data from a FPGA to a PC. Implement a 400 MB/s PCIe link to transfer data from a FPGA to a PC.