Kalpitha Ramachandra
Firmware Engineer at Tichawa Vision GmbH- Claim this Profile
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Bio
Experience
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Tichawa Vision GmbH
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Germany
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Computers and Electronics Manufacturing
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1 - 100 Employee
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Firmware Engineer
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Dec 2019 - Present
▪ Processing of high speed Image on CIS systems with 3 Clock domains.▪ VHDL implementation of shading correction, pixel binning, X and Y Geometry correction and autocorrelation. Static timing analysis, Clock domain Crossing.▪ CameraLink, SERDES, IOBUFS, DDR and Block RAM IP core implementation.▪ Validation and Verification – Oscilloscope, Chipscope, Logic Analyzer debug.▪ System and Functional verification. Assembling and Integration of hardware. ▪ Processing of high speed Image on CIS systems with 3 Clock domains.▪ VHDL implementation of shading correction, pixel binning, X and Y Geometry correction and autocorrelation. Static timing analysis, Clock domain Crossing.▪ CameraLink, SERDES, IOBUFS, DDR and Block RAM IP core implementation.▪ Validation and Verification – Oscilloscope, Chipscope, Logic Analyzer debug.▪ System and Functional verification. Assembling and Integration of hardware.
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FZI Forschungszentrum Informatik
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Germany
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Research Services
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200 - 300 Employee
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Master Thesis Student
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May 2019 - Nov 2019
▪ Literature study of Dynamic Partial Reconfiguration and Readback concept.▪ Investigation of Architecture of Xilinx - Zynq and Ultrascale+ MPSOC.▪ Worked with IP cores - AXI Interconnect, PRC, HWICAP logi cores.▪ Trade-off study and Implementation on the methods to re-configure and readback the bitstream. JTAG, PCAP, ICAP ▪ Literature study of Dynamic Partial Reconfiguration and Readback concept.▪ Investigation of Architecture of Xilinx - Zynq and Ultrascale+ MPSOC.▪ Worked with IP cores - AXI Interconnect, PRC, HWICAP logi cores.▪ Trade-off study and Implementation on the methods to re-configure and readback the bitstream. JTAG, PCAP, ICAP
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Tech Mahindra
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IT Services and IT Consulting
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700 & Above Employee
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Software Engineer
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Sep 2013 - Feb 2016
▪ Developer –Involved in requirement analysis, design for product life cycle management tool, programming the web application using Java, managing real time and migrated data. Worked on the integration part of Cadence to Enovia.▪ Test Engineer – unit testing, manual testing to know the functionality and automation testing, writing the scripts and reducing the redundancy. ▪ Developer –Involved in requirement analysis, design for product life cycle management tool, programming the web application using Java, managing real time and migrated data. Worked on the integration part of Cadence to Enovia.▪ Test Engineer – unit testing, manual testing to know the functionality and automation testing, writing the scripts and reducing the redundancy.
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Education
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Bremerhaven University of Applied Sciences
Master of Science - MS, Electrical and Electronics Engineering -
Bangalore Institute of Technology
Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering